USB on-the-go high-speed (OTG_HS) RM0090
1416/1731 DocID018909 Rev 11
OTG_HS general core configuration register (OTG_HS_GCCFG)
Address offset: 0x038
Reset value: 0x0000 0000
313029282726252423222120191817161514131211109876543210
Reserved
NOVBUSSENS
SOFOUTEN
VBUSBSEN
VBUSASEN
I2CPADEN
.PWRDWN
Reserved
rw rw rw rw rw rw
Bits 31:22 Reserved, must be kept at reset value.
Bit 21 NOVBUSSENS: V
BUS
sensing disable option
When this bit is set, V
BUS
is considered internally to be always at V
BUS
valid level (5 V). This
option removes the need for a dedicated V
BUS
pad, and leave this pad free to be used for
other purposes such as a shared functionality. V
BUS
connection can be remapped on
another general purpose input pad and monitored by software.
This option is only suitable for host-only or device-only applications.
0: V
BUS
sensing available by hardware
1: V
BUS
sensing not available by hardware.
Bit 20 SOFOUTEN: SOF output enable
0: SOF pulse not available on PAD
1: SOF pulse available on PAD
Bit 19 VBUSBSEN: Enable the V
BUS
sensing “B” device
0: V
BUS
sensing “B” disabled
1: V
BUS
sensing “B” enabled
Bit 18 VBUSASEN: Enable the V
BUS
sensing “A” device
0: V
BUS
sensing “A” disabled
1: V
BUS
sensing “A” enabled
Bit 17 I2CPADEN: Enable I
2
C bus connection for the external I
2
C PHY interface.
0: I
2
C bus disabled
1: I
2
C bus enabled
Bit 16 PWRDWN: Power down
Used to activate the transceiver in transmission/reception
0: Power down active
1: Power down deactivated (“Transceiver active”)
Bits 15:0 Reserved, must be kept at reset value.