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STMicroelectronics STM32F405 User Manual

STMicroelectronics STM32F405
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USB on-the-go high-speed (OTG_HS) RM0090
1442/1731 DocID018909 Rev 11
OTG_HS device each OUT endpoint-1 interrupt register
(OTG_HS_DOEPEACHMSK1)
Address offset: 0x884
Reset value: 0x0000 0000
Bit 6 INEPNEM: IN endpoint NAK effective mask
0: Masked interrupt
1: Unmasked interrupt
Bit 5 INEPNMM: IN token received with EP mismatch mask
0: Masked interrupt
1: Unmasked interrupt
Bit 4 ITTXFEMSK: IN token received when TxFIFO empty mask
0: Masked interrupt
1: Unmasked interrupt
Bit 3 TOM: Timeout condition mask (nonisochronous endpoints)
0: Masked interrupt
1: Unmasked interrupt
Bit 2 Reserved, must be kept at reset value.
Bit 1 EPDM: Endpoint disabled interrupt mask
0: Masked interrupt
1: Unmasked interrupt
Bit 0 XFRCM: Transfer completed interrupt mask
0: Masked interrupt
1: Unmasked interrupt
313029282726252423222120191817161514131211109876543210
Reserved
NYETM
NAKM
BERRM
Reserved
BIM
TXFURM
Reserved
INEPNEM
INEPNMM
ITTXFEMSK
TOM
Reserved
EPDM
XFRCM
rw rw rw rw rw rw rw rw rw rw rw
Bits 31:15 Reserved, must be kept at reset value.
Bit 14 NYETM: NYET interrupt mask
0: Masked interrupt
1: unmasked interrupt
Bit 13 NAKM: NAK interrupt mask
0: Masked interrupt
1: Unmasked interrupt
Bit 12 BERRM: Bubble error interrupt mask
0: Masked interrupt
1: Unmasked interrupt
Bit 11:10 Reserved, must be kept at reset value.

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STMicroelectronics STM32F405 Specifications

General IconGeneral
BrandSTMicroelectronics
ModelSTM32F405
CategoryController
LanguageEnglish

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