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STMicroelectronics STM32F405 User Manual

STMicroelectronics STM32F405
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USB on-the-go high-speed (OTG_HS) RM0090
1456/1731 DocID018909 Rev 11
OTG_HS device IN endpoint transmit FIFO status register
(OTG_HS_DTXFSTSx) (x = 0..5, where x = Endpoint_number)
Address offset for IN endpoints: 0x918 + (Endpoint_number × 0x20) This read-only register
contains the free space information for the Device IN endpoint TxFIFO.
OTG_HS device endpoint-x transfer size register (OTG_HS_DOEPTSIZx)
(x = 1..5, where x = Endpoint_number)
Address offset: 0xB10 + (Endpoint_number × 0x20)
Reset value: 0x0000 0000
The application must modify this register before enabling the endpoint. Once the endpoint is
enabled using Endpoint Enable bit of the device endpoint-x control registers (EPENA bit in
OTG_HS_DOEPCTLx), the core modifies this register. The application can only read this
register once the core has cleared the Endpoint enable bit.
313029282726252423222120191817161514131211109876543210
Reserved
INEPTFSAV
rrrrrrrrrrrrrrrr
31:16 Reserved, must be kept at reset value.
15:0 INEPTFSAV: IN endpoint TxFIFO space avail ()
Indicates the amount of free space available in the Endpoint TxFIFO.
Values are in terms of 32-bit words:
0x0: Endpoint TxFIFO is full
0x1: 1 word available
0x2: 2 words available
0xn: n words available (0 < n < 512)
Others: Reserved
3130 29282726252423222120191817161514131211109876543210
Reserved
RXDPID/S
TUPCNT
PKTCNT XFRSIZ
rw/r/
rw
rw/r/
rw
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw

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STMicroelectronics STM32F405 Specifications

General IconGeneral
BrandSTMicroelectronics
ModelSTM32F405
CategoryController
LanguageEnglish

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