EasyManuals Logo

STMicroelectronics STM32F405 User Manual

STMicroelectronics STM32F405
1731 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #1521 background imageLoading...
Page #1521 background image
DocID018909 Rev 11 1521/1731
RM0090 USB on-the-go high-speed (OTG_HS)
1529
as it eventually results in an incomplete isochronous IN transfer interrupt
(IISOIXFR in OTG_HS_GINTSTS) at the end of periodic frame.
The core transmits a zero-length data packet on the USB in response to the
received IN token.
2. The application must stop writing the data payload to the transmit FIFO as soon as
possible.
3. The application must set the NAK bit and the disable bit for the endpoint.
4. The core disables the endpoint, clears the disable bit, and asserts the Endpoint Disable
interrupt for the endpoint.
Application programming sequence
1. The application can ignore the IN token received when TxFIFO empty interrupt in
OTG_HS_DIEPINTx on any isochronous IN endpoint, as it eventually results in an
incomplete isochronous IN transfer interrupt (in OTG_HS_GINTSTS).
2. Assertion of the incomplete isochronous IN transfer interrupt (in OTG_HS_GINTSTS)
indicates an incomplete isochronous IN transfer on at least one of the isochronous IN
endpoints.
3. The application must read the Endpoint Control register for all isochronous IN
endpoints to detect endpoints with incomplete IN data transfers.
4. The application must stop writing data to the Periodic Transmit FIFOs associated with
these endpoints on the AHB.
5. Program the following fields in the OTG_HS_DIEPCTLx register to disable the
endpoint:
SNAK = 1 in OTG_HS_DIEPCTLx
EPDIS = 1 in OTG_HS_DIEPCTLx
6. The assertion of the Endpoint Disabled interrupt in OTG_HS_DIEPINTx indicates that
the core has disabled the endpoint.
At this point, the application must flush the data in the associated transmit FIFO or
overwrite the existing data in the FIFO by enabling the endpoint for a new transfer
in the next micro-frame. To flush the data, the application must use the
OTG_HS_GRSTCTL register.
Stalling nonisochronous IN endpoints
This section describes how the application can stall a nonisochronous endpoint.
Application programming sequence:

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the STMicroelectronics STM32F405 and is the answer not in the manual?

STMicroelectronics STM32F405 Specifications

General IconGeneral
BrandSTMicroelectronics
ModelSTM32F405
CategoryController
LanguageEnglish

Related product manuals