Texas Instruments TMS320C6455 - Page 40

TMS320C6455
SPRS276M –MAY 2005–REVISED MARCH 2012 www.ti.com
Table 2-3. Terminal Functions (continued)
SIGNAL
TYPE
(1)
IPD/IPU
(2)
DESCRIPTION
NAME NO.
ETHERNET MAC (EMAC) [RGMII]
If the Ethernet MAC (EMAC) and MDIO are enabled (AEA12 driven low [UTOPIA_EN = 0]), there are two additional configuration pins - the
MAC_SEL[1:0] (AEA[10:9] pins) - that select one of the four interface modes (MII, RMII, GMII, or RGMII) for the EMAC/MDIO interface. For
more detailed information on the EMAC configuration pins, see Section 3, Device Configuration.
RGMII reference clock (O). This 125-MHz reference clock is provided as a
convenience. It can be used as a clock source to a PHY, so that the PHY may
RGREFCLK C4 O/Z generate RXC clock to communicate with the EMAC. This clock is stopped
while the device is in reset. This pin is available only when RGMII mode is
selected ( MACSEL[1:0] =11).
RGMII transmit clock (O). This pin is available only when RGMII mode is
RGTXC D4 O/Z
selected (MACSEL[1:0] =11).
RGTXD3 A2
RGTXD2 C3
RGMII transmit data [3:0] (O). This pin is available only when RGMII mode is
O/Z
selected (MACSEL[1:0] =11).
RGTXD1 B3
RGTXD0 A3
RGMII transmit enable (O). This pin is available only when RGMII mode is
RGTXCTL D3 O/Z
selected (MACSEL[1:0] =11).
RGMII receive clock (I). This pin is available only when RGMII mode is selected
RGRXC E3 I
(MACSEL[1:0] =11).
RGRXD3 C1 I
RGRXD2 E4 I
RGMII receive data [3:0] (I). This pin is available only when RGMII mode is
selected (MACSEL[1:0] =11).
RGRXD1 E2 I
RGRXD0 E1 I
RGMII receive control (I). This pin is available only when RGMII mode is
RGRXCTL C2 I
selected (MACSEL[1:0] =11).
RESERVED FOR TEST
RSV02 V5
RSV03 W3
Reserved. These pins must be connected directly to core supply (CV
DD
) for
proper device operation.
RSV04 N11
RSV05 P11
Reserved. This pin must be connected directly to 1.5-/1.8-V I/O supply
(DV
DD15
) for proper device operation.
RSV07 G4 I
NOTE: If the EMAC RGMII is not used, these pins can be connected directly to
ground (V
SS
).
Reserved. This pin must be connected directly to the 1.8-V I/O supply (DV
DD18
)
RSV09 D26 I
for proper device operation.
Reserved. This pin must be connected to ground (V
SS
) via a 200-Ω resistor for
proper device operation.
NOTE: If the DDR2 Memory Controller is not used, the V
REFSSTL
, RSV11, and
RSV11 D24 RSV12 pins can be connected directly to ground (V
SS
) to save power.
However, connecting these pins directly to ground will prevent boundary-scan
from functioning on the DDR2 Memory Controller pins. To preserve boundary-
scan functionality on the DDR2 Memory Controller pins, see Section 7.3.4.
Reserved. This pin must be connected to the 1.8-V I/O supply (DV
DD18
) via a
200-Ω resistor for proper device operation.
NOTE: If the DDR2 Memory Controller is not used, the V
REFSSTL
, RSV11, and
RSV12 C24 RSV12 pins can be connected directly to ground (V
SS
) to save power.
However, connecting these pins directly to ground will prevent boundary-scan
from functioning on the DDR2 Memory Controller pins. To preserve boundary-
scan functionality on the DDR2 Memory Controller pins, see Section 7.3.4.
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