Princeton Instruments PI-MAX4 - Figure 6-15: Typical Supersynchro Timing Expander

114 PI-MAX
®
4 System Manual Issue 9
Figure 6-15: Typical SuperSYNCHRO Timing Expander
Perform the following procedure to configure gate timing parameters as indicated:
a. Mode: Sequential
If using a Gen II intensifier, deselect Enable Bracket Pulsing for this experiment.
b. Perform the following procedure to configure the pulse sequence:
• Click on the Frames to Save hyperlink. Enter the number of frames to be
acquired (e.g.,
41 for this experiment.)
• Configure the Starting Gate Width and Ending Gate Width.
Because this experiment requires a fixed gate width, these values will be
the same.
• Starting Gate Delay: 1 s;
• Ending Gate Delay: 201 s;
• Click on the On-CCD Accumulations hyperlink. Enter the number of
On-CCD Accumulations per frame (e.g., 1 for this experiment.)
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