Princeton Instruments PI-MAX4 - Using Pre-Trigger

162 PI-MAX
®
4 System Manual Issue 9
• Trigger Determined By;
Specifies on which edge of the incoming trigger pulse the camera is triggered.
Valid values are:
— Rising Edge;
— Falling Edge.
• Anticipate Trigger.
When enabled, a second trigger pulse (i.e., Pre-Trigger,) is used to allow sufficient
time for the camera hardware to prepare for an acquisition prior to receiving the
trigger pulse to initiate image acquisition. Refer to Section 9.4, Using Pre-Trigger,
for complete information about this feature.
9.4 Using Pre-Trigger
NOTE:
The use of a Pre-Trigger signal is only supported by
LightField.
When configured for DIF operation, a PI-MAX4 1024i requires approximately 86 S
following the receipt of a trigger pulse to:
• Complete any cleaning operation that may be in progress, and
• Prepare the CCD to take the first image of a DIF pair.
However, the CCD can only remain in the “ready for first image” state for approximately
5 S. Therefore, if an image is not taken within this time, the camera instructs the CCD
perform the
Shift Behind Mask step of the DIF sequence in order to protect the CCD.
Trigger pulses can often be jittery relative to the event of interest (e.g., a hypervelocity gas
gun experiment in which the projectile time of flight varies from shot to shot, where the
impact is the event of interest,) so accurate image data may not be reliably acquired.
Incorporating a Pre-Trigger signal into an experiment can help to solve this issue. The
Pre-Trigger signal is supplied to the camera via:
• The green BNC cable on the AUX I/O cable is connected to the external
Pre-Trigger source;
• Pin 2 of the DB26 AUX I/O connector supplies the Pre-Trigger signal to the
camera.
Refer to Section A.6, AUX I/O Interface, on page 270 for complete information.
When a PI-MAX4 1024i receives a Pre-Trigger pulse it performs the two actions described
above. An adequately delayed trigger pulse then follows which triggers the Timing
Generator and Intensifier Gate, and image data is acquired.
NOTES:
1. For proper Pre-Trigger operation, all system timing must
be relative to the TTL-logic level
0 to 1 transition (i.e.,
rising edge,) of the incoming Pre-Trigger signal.
2. The jitter tolerance between when the Pre-Trigger signal is
received and when the event of interest occurs is ±2 S.