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STMicroelectronics STM32F405 User Manual

STMicroelectronics STM32F405
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Controller area network (bxCAN) RM0090
1096/1731 DocID018909 Rev 11
CAN error status register (CAN_ESR)
Address offset: 0x18
Reset value: 0x0000 0000
Bit 2 FFIE0: FIFO full interrupt enable
0: No interrupt when FULL bit is set.
1: Interrupt generated when FULL bit is set.
Bit 1 FMPIE0
: FIFO message pending interrupt enable
0: No interrupt generated when state of FMP[1:0] bits are not 00b.
1: Interrupt generated when state of FMP[1:0] bits are not 00b.
Bit 0 TMEIE
: Transmit mailbox empty interrupt enable
0: No interrupt when RQCPx bit is set.
1: Interrupt generated when RQCPx bit is set.
Note: Refer to Section 32.8: bxCAN interrupts.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
REC[7:0] TEC[7:0]
rrrrrrrrrrrrrrrr
1514131211109876543210
Reserved
LEC[2:0]
Res.
BOFF EPVF EWGF
rw rw rw r r r
Bits 31:24 REC[7:0]: Receive error counter
The implementing part of the fault confinement mechanism of the CAN protocol. In case of
an error during reception, this counter is incremented by 1 or by 8 depending on the error
condition as defined by the CAN standard. After every successful reception the counter is
decremented by 1 or reset to 120 if its value was higher than 128. When the counter value
exceeds 127, the CAN controller enters the error passive state.
Bits 23:16 TEC[7:0]
: Least significant byte of the 9-bit transmit error counter
The implementing part of the fault confinement mechanism of the CAN protocol.
Bits 15:7 Reserved, must be kept at reset value.
Bits 6:4 LEC[2:0]: Last error code
This field is set by hardware and holds a code which indicates the error condition of the last
error detected on the CAN bus. If a message has been transferred (reception or
transmission) without error, this field will be cleared to ‘0’.
The LEC[2:0] bits can be set to value 0b111 by software. They are updated by hardware to
indicate the current communication status.
000: No Error
001: Stuff Error
010: Form Error
011: Acknowledgment Error
100: Bit recessive Error
101: Bit dominant Error
110: CRC Error
111: Set by software
Bit 3 Reserved, must be kept at reset value.

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STMicroelectronics STM32F405 Specifications

General IconGeneral
BrandSTMicroelectronics
ModelSTM32F405
CategoryController
LanguageEnglish

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