STMicroelectronics STM32F405 User Manual

DocID018909 Rev 11 1721/1731
RM0090 Revision history
1726
16-Mar-2015 9
PWR:
Updated Section 5.1.2: Battery backup domain.
Updated Table 23: Low-power mode summary to add Return from
ISR as entry condition.
Added Section : Entering low-power mode and Section : Exiting low-
power mode.
Updated Section : Entering Sleep mode, Section : Exiting Sleep
mode, Table 24: Sleep-now entry and exit and Table 25: Sleep-on-
exit entry and exit.
Updated Section : Entering Stop mode (for STM32F405xx/07xx and
STM32F415xx/17xx), Section : Exiting Stop mode (for
STM32F405xx/07xx and STM32F415xx/17xx) and Table 27: Stop
mode entry and exit (for STM32F405xx/07xx and
STM32F415xx/17xx). Updated Section : Entering Stop mode
(STM32F42xxx and STM32F43xxx), Section : Exiting Stop mode
(STM32F42xxx and STM32F43xxx) and Table 29: Stop mode entry
and exit (STM32F42xxx and STM32F43xxx).
Updated Section : Entering Standby mode, Section : Exiting Standby
mode and Table 30: Standby mode entry and exit.
RCC:
Updated bits 24 to 31 access type in Section 7.3.22: RCC clock
control & status register (RCC_CSR).
GPIOs:
Added port A reset value in Section 8.4.3: GPIO port output speed
register (GPIOx_OSPEEDR) (x = A..I/J/K).
DMA:
Update FTH[1:0] description in Section 10.5.10: DMA stream x FIFO
control register (DMA_SxFCR) (x = 0..7).
TIM2/5:
Register format changed to 32 bits instead of 16 in Section 18.4.10:
TIMx counter (TIMx_CNT) and Section 18.4.12: TIMx auto-reload
register (TIMx_ARR).
TIM9 to 14:
Updated Table 100: TIMx internal trigger connection
WWDG:
Updated Figure 214: Watchdog block diagram and Section 22.4:
How to program the watchdog timeout.
Updated Figure 215: Window watchdog timing diagram
RNG:
Replaced PLL48CLK by RNG_CLK in the whole section.
Table 310. Document revision history (continued)
Date Version Changes

STMicroelectronics STM32F405 Specifications

General

Brand	STMicroelectronics
Model	STM32F405
Category	Controller
Language	English