Freescale Semiconductor MC68881 - Page 18

LIST OF TABLES (Continued)
Table Page
Number Title Number
6-1 MC68881/MC68882 Exception Vector Assignments ........................... 6-4
6-2 Possible Operand Errors ............................................................. 6-8
6-3 Possible Divide-by-Zero Exceptions ............................................... 6-14
6-4 BIU Flag Bit Definitions .............................................................. 6-35
6-5 MC68881/MC68882 Responses to Save Command ............................ 6-36
6-6 MC68881/MC68882 Format Word Definitions ................ , .................. 6-37
7-1 MPU CPU Space Type Field Encoding ........................................... 7-2
7-2 Coprocessor Interface Register Characteristics ................................. 7-3
7-3 Null Primitive Encodings ........... ~ ................................................ 7-12
7-4 Coprocessor Valid Effective Address Codes .................................... 7-14
7-5 Evaluate Effective Address and Transfer Data Primitive Encoding ........ 7-14
7-6 FPCP Vector Numbers ................................................................ 7-17
7-7 MC68881/MC68882 Primitive Responses ........................................ 7-20
8-1
8-2
8-3
8-4
8-5
8-6
8-7
8-8
8-9
8-10
8-11
8-12
8-13
8-14
8-15
8-16
8-17
8-18
8-19
8-20
8-21
8-22
8-23
8-24
8-25
Effective Address Calculations ..................................................... 8-13
MC68881 Overall Execution Times ................................................ 8-14
MC68882 Overall Execution Times ................................................ 8-15
Bus Cycle Activity- Arithmetic Operations .................................... 8-16
Timing Calculation Example ........................................................ 8-16
Move Control Register and MOVEM Execution Times ....................... 8-17
Conditional Instruction Execution Times ........................................ 8-18
FSAVE and FRESTORE Instruction Execution Times .......................... 8-19
Instruction Start-Up Times .......................................................... 8-25
Null Primitive Time Values .......................................................... 8-26
Operand Transfer Time -- External Operand ................................... 8-26
Operand Transfer Time -- Immediate Operand ............................... 8-26
Input Operand Conversion .......................................................... 8-28
Arithmetic Calculation Times -- Dyadic Operations .......................... 8-30
Arithmetic Calculation Times -- Monadic Operations ........................ 8-34
Output Operand Conversion ........................................................ 8-35
Output Operand Conversion -- Binary Real Formats ......................... 8-35
Rounding Operation Time Values ................................................. 8-35
Exception Handling Time Values .................................................. 8-36
Conditional Termination Times Values .......................................... 8-37
Multiple Register Transfer Time Values .......................................... 8-38
State Frame Transfer Time Values ................................................ 8-38
Instruction Termination Processing Time Values .............................. 8-38
Exception Processing Time Values ................................................ 8-39
Overlap Allowed Times -- Arithmetic Operations ............................. 8-40
9-1 Coprocessor Interface Register Selection ........................................ 9-2
9-2 System Data Bus Size Configuration ............................................. 9-2
9-3 DSACK Assertions ..................................................................... 9-4
9-4 VCC and GND Pin Assignments ................................................... 9-6
9-5 Signal Summary ....................................................................... 9-7
FREESCALE
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MC68881/MC68882 USER'S MANUAL