Freescale Semiconductor MC68881 - Instruction Description Conventions; Instruction Groups

SECTION 4
INSTRUCTION SET
This section describes the MC68881/MC68882 (FPCP) instruction set in detail, using the
Freescale assembly language syntax and notation. As an introduction, a summary of the
instruction set is presented, followed by a detailed description of each instruction. Also,
included at the end of this section is a listing of the binary pattens of all of the instructions
and an opcode map summary for use by assembler and compiler writers.
4.1 INSTRUCTION DESCRIPTION CONVENTIONS
The instruction
notation:
B,W,L
S
D
X
P
FPm, FPn
FPcr
<ea>
k
CCC
<list>
<label>
set is discussed in this section using functional grouping and the following
The same size codes as all M68000 Family processors; specifies a signed
integer data type (twos complement) of byte (8 bits), word (16 bits), or
long word (32 bits)
Single precision real data format (32 bits)
Double precision real data format (64 bits)
Extended precision real data format (96 bits, 16 bits unused)
Packed BCD real data format (96 bits, 12 bytes)
One of eight floating-point data registers
One of the three floating-point system control registers (FPCR, FPSR, or
FPIAR)
Any valid MC68020/MC68030 (MPU) address mode
A twos-complement signed integer ( - 64 to + 17) that specifies the format
of a number to be stored in the packed decimal format
An index into the FPCP constant ROM
A list of floating-point data registers or control registers
A relative label used by an assembler to calculate a displacement
4.2 INSTRUCTION GROUPS
The following paragraphs briefly describe each instruction group along with tables showing
the Freescale syntax for each instruction. The FPCP instructions can be separated into the
following groups:
Data Movement
Dyadic Operations
Monadic Operations
Program Control
System Control
MC68881/MC68882 USER'S MANUAL FREESCALE
4-1