For output operand transfers, the timing numbers include the processing for the evaluate
effective address and transfer data primitive (with CA= 1). Since no overlap occurs during
an output transfer, the values in the table are used directly in the overall execution time
calculation. Note that the bus cycle activity numbers include the read of the evaluate
effective address and transfer data primitive at the end of the conversion (even though the
execution time for the conversion is not included). The read time is included because null
(CA = 1, IA = 1 ) primitives are read during the instruction start-up operation and while wait-
ing for the conversion to complete, and the evaluate effective address and transfer data
primitive is read during the processing of one of those primitives.
In order to calculate the effective execution time for the MPU for either input or output
transfers, the processing time for the null (CA = 0) primitive that terminates the dialog must
be included. For output conversions that cause an enabled exception, the take mid-instruc-
tion exception primitive is returned after the operand transfer is complete. In this case, the
appropriate exception processing execution time values must be included in lieu of the
null (CA=0) processing time in the calculation of the overall execution time.
8.5.2.3 INPUT OPERAND CONVERSION. All FPCP instructions that require an input op-
erand execute an implied conversion to the 80-bit extended precision format that is used
internally. The amount of time required to perform this conversion depends on the format,
value, and type of the input operand. Table 8-11 shows the amount of time required to
convert an input operand to the internal data format, starting from the end of the internal
operand transfer after the last write cycle to the operand CIR.
For dyadic operations, one portion of Table 8-13 for conversions from each combination
of source data format and type versus destination data type is included. For monadic
operations, one portion includes the conversion timing for any data format and type. Only
one number is listed in each entry, since the total number of clock cycles required is equal
to the number of overlap allowed clock cycles, and no bus cycles are generated during
this stage Of an instruction (since the FPCP does not require any further services of the
MPU after this stage of an instruction starts).
8.5.2.4 ARITHMETIC CALCULATION. Tables 8-14 and 8-15 show the time required by the
MC68881 to perform any of its general-purpose arithmetic operations. One portion of Table
8-14 shows the execution time values for each dyadic instruction with respect to the com-
bination of input operand data types. Table 8-15 shows the execution time values for all
of the monadic operations. Each entry in these tables includes the time from the end of
the input operand conversion to completion of the calculation. Only one number is shown
for each entry, since no bus cycles are generated during this stage of an instruction. Also,
the total number of clock cycles required for the calculation is equal to the number of
overlap allowed clock cycles, since the FPCP does not require any further services of the
MPU after this stage of an instruction starts.
Some entries in these tables refer to a footnote that contains more detailed timing infor-
mation for an operation (e.g., the table for addition contains an entry that references the
ADD footnote, which contains three numbers, based on the input operands). Furthermore,
in some cases, an entry refers to another table that contains the execution time required
to handle certain input operands. For example, if an entry contains NAN1, refer to the entry
of the same name in 8.5.2.10 EXCEPTION PROCESSING.
MC68881/MC68882 USER'S MANUAL FREESCALE
8-27
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