Freescale Semiconductor MC68881 - Optimized Linpack Loop; State Frame Sizes

VECTOR TIMES A CONSTANT PLUS A VECTOR
X(il = Y(i)*C + Xli)
MOVE,L #count, D0
FMDVE,D <ea_C>,FP0
FMDVE.X
FP0,FP1
FMUL.D <ea_Y(i)>,FP1
BRA L00PSTRT
L00PTOP FMOVE.X FP0,FP1
FMULO <ea_Y(i)>,FP1
FMOVE.D FP2,<ea-Xli + 1)>
L00PSTRT FADD,n <ea_X(iI,FP1
FMOVE.X FP0,FP2
FMUL.D <ea_Y(i+ 1)>.FP2
FMOVE.D FPl,<ea-X(i)>
FAOD.D <ea_X(i + 1)>,FP2
DBRA D0,LOOPTOP
FMOVE.D FP2,<ea_X(i + 1l>
Figure 5-5. Optimized Linpack Loop
Table 5-8. State Frame Sizes
Device Null Frame Idle Frame Busy Frame
MC68881 4 Bytes 28 Bytes 184 Bytes
MC68882 4 Bytes 60 Bytes 216 Bytes
The size of the null state frame s four bytes for both coprocessors. The size of the other
state frames is 32 bytes larger for the MC68882 than for the MC68881. The MC68882 uses
the additional bytes to store the state of the conversion unit.
5,2.2 Exception Handler Code
The code for floating-point exception handlers for the MC68882 must include the following
instructions:
1. An FSAVE instruction at the beginning of the handler (ahead of the first coprocessor
instruction)
2. A BSET or similar instruction following the FSAVE instruction to set the EXC-PEND
flag (bit 27) of the BIU flag in the idle state frame
3. An FRESTORE instruction immediately preceding the RTE instruction
Handlers for the following exceptions require these instructions even if the handlers contain
no floating-point instructions:
Branch or Set on Unordered Condition Operand Error
Inexact Result Overflow
Floating-Point Divide by Zero Signaling NAN
Underflow
MC68881/MC68882 USER'S MANUAL FREESCALE
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