MC68020/MC68030
ECO-FC2
A20-A3!
A16-A19
AI3-AI5
A5-AI2
A 1-A4
AO
DS
R/W
D24-D31 ,~,
D16-D23
D8-D15
DO-D7
DSACKO
DSACKI
C.'P
SELECT
~1 DECODE
-I
GNO
D-
)p-
MC6888!/MC68882
E~
m
SIZE
A1-A4
AO
AS
DS
R/~
O24-g31
o16-023
DS-DI5
DO-07
OSACKO
DSACK!
f t
MAIN PROCESSOR COPROCESSOR
CLOCK CLOCK
Figure 11-3. 8-Bit Data Bus Coprocessor Connection
11.2 INTERFACING THE FPCP AS A PERIPHERAL
The following paragraphs describe the connecting of the FPCP to an MC68000, MC68008,
or MC68010 processor for operation as a peripheral using an 8- or 16-bit data bus.
11.2.1 16-Bit Data Bus Peripheral Processor Connection
Figure 11-4 illustrates the connection of an FPCP to an MC68000 or MC68010 as a peripheral
processor over a 16-bit data bus. The FPCP is configured to operate over a 16-bit data bus
when the SIZE pin is connected to VCC, and the A0 pin is connected to GND. The 16 least
significant data pins (D15-D0) must be connected to the 16 most significant data pins
(D31-D16) when the FPCP is configured to operate over a 16-bit data bus (i.e., connect DO
to D16, D1 to D17 .... and D15 to D31). The DSACK1 pin of the FPCP is connected to the
DTACK pin of the main processor, and the DSACK0 pin is not used.
When connected as a peripheral processor, the FPCP chip select (CS) decode is system
dependent. If the MC68000 is used as the main processor, the FPCP CS must be decoded
in the supervisor or user data spaces. However, if the MC68010 is used for the main
processor, the MOVES instruction can be used to emulate any CPU space access that the
MPU generates for coprocessor communications. Thus, the CS decode logic for such sys-
tems may be the same as in an MC68020 or MC68030 system; that is, the FPCP does not
use any part of the data address spaces.
MC68881/MC68882 USER'S MANUAL FREESCALE
11-3
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