Freescale Semiconductor MC68881 - MC68881 Overall Execution Times

8
Table 8-2. MC68881 Overall Execution Times
Instruction
FABS
FACOS
I FADD
FASIN
FATAN
FATANH
FCMP
FCOS
FCOSH
FDIV
FETOX
FETOXM1
FGETEXP
FGETMAN
FINT
FINTRZ
FLQGN
FLOGNP1
FPn to FPm
35
625
581
403
Os3
33
391
607
103
497
645
45
31
55
55
625
571
Integer
62
652
80
608
430
720
62
418
634
132
524
572
72
58
82
82
552
598
Memory Source or Destination Operand Format
Single
54
644
72
600
422
712
54
410
626
124
516
564
64
50
74
74
544
590
FMUL 71 100 92
Double
60
650
78
606
428
718
60
416
632
130
522
570
70
56
80
80
550
596
i Extended
I 58 i
646 i
76
604
426
716 I
I 58 i
414
630
128
520
568
68
54
I 78
I 78
] 594
I £8
Packed
872
1462
888
1418
1240
1530
870
122B
1444
940
1334
1382
882
I 892
i $~2
I t3 2
t ~3
FLOG IO 581 608 600 606 1418
FLOG2 581 608 600 606 604 1 1418
FMOD 70 99 91 97 95 I 907
FMOVE to FPn 33 60 52 58 56 { 870
FMOVE to memory -- 100 80 86 { 72 ! 2002
FMOVECR 29 -- -- -- I -- !- --
9gS
FNEG 35 62 54
FREM 100 129 121
FSCALE 41 70 62
69 FSGLDIV
90
J 96 !
80
I 125 ,
94 i
FSGLMUL
127
68
59
96
86
672
937
98
878
936
88
FSIN 391 418 410
FSINCOS 461 478 470
FSINH 714 706
FSQRT
126
134
667
107
FTST 33
896
416 414 1228
476 474 ! 1288
712 710 1524
132
130
944
FSUB 51 80 72 78 76 i 883
FTAN 473 500 492 498 495 I 1310
FTANH 661 688 680 686 684 ! 14£3
FTENTOX 567 594 586 592 5£0 1404
60 52 58 87O
594
!
I 56 i
567
586
592 I 590 ! 1404
FTWOTOX
*Add the appropriate effective address calculation time.
**If the source or destination is an MPU
data register, subtract five or two clock cycles, respectively.
***Assumes a static k factor is used if the destination data format is packed decimal. Add 14 clock cycles if a dynamic k
factor is used.
****The source operand is from the constant ROM rather than a floating-point data register.
FREESCALE
8-14
MC68881/MC68882 USER'S MANUAL