Freescale Semiconductor MC68881 - Dyadic Operations; Fully-Concurrent Instructions; Partial-Concurrency Instructions

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Table 5-3. Dyadic Operations
Instruction Function
FADD ' Add
FCMP
i Compare
FDIV ~ Divide
FMOD , Modulo Remainder
FMUL , Multiply
FREM IEEE Remainder
FSCALE i Scale Exponent
FSGLDIV Single Precision Divide
FSGLMUL Single Precision Multiply
FSUB Subtract
Table 5-4. Partial-Concurrency Instructions
Instruction Operand Operand
Syntax Format
FTST <ea> S,D,X
FPm X
F<mop> <ea>,FPn S,D,X
FPm,FPn
F<dop> <ea>,FPn S,D,X
FPm,FPn
FSINCOS <ea>,FPc:FPs S,D,X
FPm,FPc:FPs X
Table 5-5. Fully-Concurrent Instructions
Instruction Operand Operand
Syntax Format
FMOVE FPm,FPn X
FMOVE <ea >.FPn S,D
FMOVE <ea >,FPn X
FMOVE FPm,<ea>
FMOVE FPm,<ea>
S.D a
X a
a. Register Conflict of FPm with preceding instruction's des-
tination floating-point data register
b. NAN, Unnormalized or Denormalized Data Types
c. Rounding Precision in FPCR set to Single or Double
d. INEX2 bit in FPCR EXC byte is enabled
e. An Overflow or Underflow occurs
f. Register conflict of FPn with preceding instruction's desti-
nation floating-point data register
Degraded to
No Concurrency
Degraded to
Partial Concurrency
b,c,f
b,c,f
b,c,f
b,d,e
FREESCALE
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MC68881/MC68882 USER'S MANUAL