Freescale Semiconductor MC68881 - Coprocessor Identification Code

5
CLR.B FLAG CLEAR NO PROCESSOR FLAG
FNOP DETECT COPROCESSOR (SEE NOTE}
MOVE.B FLAG,DO LOAD FLAG
BNE NOCOP NO COPROCESSOR BRANCH
FSAVE - (SP) SAVE INTERNAL STATE
CLR+L DO ZERO INDEX
MOVE.B I(SP),DO OBTAIN STATE FRAME SIZE
CMPI #$18,D0 MC68881?
BEO. ONE YES
CODE FOR MCB8882
BRA START END OF MC68882 CODE
ONE CODE FOR MC68881
START ... START OF CODE COMMON TO BOTH COPROCESSORS
NOTE: When no coprocessor is present, an exception handler executes at this point. See text.
Figure 5-9, Coprocessor Identification Code
The FNOP instruction takes an F-line emulation exception when no floating-point copro-
cessor is available. The F-line emulation exception handler must set the no coprocessor
flag and increment the stacked PC value by four. The BNE instruction branches around
this code when no coprocessor is present. The instructions immediately following the BEQ
instruction are executed for an MC68882 coprocessor; those at label ONE are executed for
an MC68881.
FREESCALE
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MC68881/MC68882 USER'S MANUAL