C
CA Bit, 7-10
Calculation Phase Timing, 8-3
Characteristics,
AC Electrical
Clock Input, 12-3
Read and Write Cycles, 12-4
DC Electrical, 12-2
Thermal, 12-1
Chip Select
Decode, 7-1, 7-2. 11-3
Signal, 7-3, 9-3, 10-6, 10-8, 10-9. 10-10
Timing, 10-6
CIR. 1-6, 7-2, 7-3, 9-2, 10-1
Command. 5-1.5-2. 5-4, 6-20, 6-21, 6-25. 6-36,
7-4-7-6, 7-17, 7-21, 7-30, 7-39, 8-6,
8-25, 10-15
Condition, 6-21.6-25, 6-36. 7-5-7-7. 7-21.
7-38, 8-6. 8-18, 8-25. 8-37
Control, 6-21, 6-23, 6-24, 6-36, 7-4-7-6,
7-13, 7-16, 7-31, 7-35, 7-39, 10-14
Instruction Address, 6-21, 6-22. 7-8
Operand, 5-4, 6-20, 6-32, 6-35, 7-3-7-7,
7-13, 7-15, 7-29. 7-40, 10-3, 10-4, 10-5,
10-14-10-16
Operand Address, 7-8
Operation Word, 7-5
Register Select, 6-21.7-7, 7-15, 7-27, 10-2,
10-15
Response. 5-1.5-2. 5-4, 5-8, 5-13. 6-3, 6-5, 6-10,
6-12, 6-13. 6-17, 6-20-6-22,
6-23, 6-25, 6-35, 6-37, 6-39, 7-3-7-6,
7-10, 7-19, 7-32, 8-6-8-10.
8-24, 8-25, 8-33, 8-34, 8-40, 10-9. 10-11,
10-14-10-15
Restore, 6-21, 6-38. 7-5. 7-6, 7-30. 8-38, 10-14
Save, 6-21, 6-35-6-37, 7-5-7-7, 7-17,
7-28, 7-38, 8-18, 8-38, 10-10, 10-12, 10-15
CLK Signal, 9-6, 10-5. 10-9, 10-10
Clock Signal, 9-6, 10-5. 10-9, 10-10
Code,
Exception Handler, 5-10
Optimization, MC68882, 5-11
Codes, Effective Address, Valid, 7-13
Command CIR, 5-1, 5-2, 5-4, 6-20, 6-21, 6-25, 6-35,
7-3-7-6. 7-17, 7-22. 7-31, 7-39, 8-7, 8-25, 10-15
Command Word,
General Type Instruction, 4-125
Undefined. 4-133
Compatibility, IEEE
Exception. 6-19
Trap, 6-19
Computational Accuracy. 4-5
Concept. Coprocessor, 1-2
ConcurrencY,
Instruction, 5-1
MC68881 FMUL and FMOVE Instruction, 5-7
MC68881 FMUL Instruction. 5-2
MC68882 FMUL and FMOVE Instruction. 6-8
Concurrent
Floating-Point
Computations,
5-1, 5-2
Instruction Execution, 8-4
Integer Computations, 5-1
Operations, MC68882, 8-13
Condition CIR, 6-20,
6-25,
6-35. 7-5-7-7. 7-19,
7-35, 8-7, 8-18.8-25, 8-36
Condition Code
Byte, 1-4, 2-4
Processing, 4-15
Conditional Branch Instruction Format. 4-131
Conditional
Instruction, 1-14. 5-7
Dialog, 7-28
Encoding. 4-135
Execution Times. 8-18
Format, 4-135
Conditional (Continued)
Predicate Field, 4-139
Encoding. 4-140
Predicates, 4-136
Termination Times, 8-36, 8-37
Test
Definitions, 4-8
Mnemonics. 4-4
Configuration, Typical Coprocessor, 1-6
Connections, Power Supply, 9-5
Considerations,
Power, 12-1
Programming, 1-16
Constant-to-Register Instructions, 4-129
Format, 4-129
Context
Restore Instruction Sequence, 6.40
Save Instruction Sequence, 6-40
Switch
Instruction Dialogs. 7-28
Processing, 5-12. 5-13
Switching, 6-28
Summary, 6-39
Control CIR, 6-21, 6-22, 6-23, 6-35, 7-3-7-6, 7-13,
7-16. 7-31, 7-33, 7-39, 10-13
Conventions. Instruction Description, 4-1
Coprocessor
Address Bus Encoding, 7-1
Applications Programming,
5-1
Concept, 1-2
Condition Trap Instruction Exception. 6-24
Connection,
16-bit Bus. 11-2
32-bit Bus, 11-1
8-bit Bus, 11-2, 11-3
Detection, 5-15
ID Field, 4-138
Identification. 5-15
Example, 5-16
Instruction, 7-8
Format, 4-125
FREESCALE
INDEX-2
MC68881/MC68882 USER'S MANUAL
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