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4.3.3 Decimal Conversions
The IEEE standard does not specify the format of the decimal real representation used by
any conforming machine, but it does define the error bounds for conversions between
decimal and the single- and double-precision binary formats. Thus, such conversions al-
ways produce consistently rounded results, and those results are predictable and repeat-
able on any conforming system. However, it is not always possible to perform an exact
conversion between these data formats, due to the limited precision of the numbers and
the different radices of the values. The error bound for these conversions is 0.97 unit in
the last digit of the destination precision for the round-to-nearest mode; and 1.47 units in
the last digit of the destination precision for the other rounding modes. When an input
conversion cannot produce an exact result, the FPCP sets the INEX1 bit in the FPSR ex-
ception byte. This indication allows for special handling of these conversion errors that is
separate from the handling of other types of inaccurate results. When an output conversion
cannot produce an exact result, the INEX2 bit is set.
The packed decimal data format supported by the FPCP allows the representation of double-
precision binary number in a decimal form, in accordance with the IEEE specification. When
a packed decimal number is converted to extended precision, the result is always in range
although the conversion may be inexact. The result is within range because the magnitudes
of the exponent and mantissa of a packed decimal number are less than the largest values
representable in the extended precision format. Refer to 6.1.8 Inexact Result on Decimal
Input for a description of the handling of inaccurate decimal-to-binary conversions.
When an extended precision number is converted to packed decimal, the result may be a
number that cannot be represented exactly, or a number that is too large to be represented
with a three-digit exponent. When this type of conversion is performed, the k factor specified
is used to locate the decimal rounding boundary. If the magnitude of the rounded decimal
result exponent exceeds 999, the FPCP signals an operand error and calculates a fourth
exponent digit, which is included in the destination operand (see Figure 3-11 for the position
. of the fourth digit). Refer to 6.1.7 Inexact Result for a description of the handling of inac-
curate binary-to-decimal conversions.
Note that the error bounds specified by the IEEE standard apply only to conversions of
values in the range of the double-precision format. The error bound for conversions by
the FPCP of extended precision values which cannot be represented in double precision
is significantly larger. Software must be provided to convert such extended precision values
to decimal. The conversion must generate decimal results with an error bound analogous
to those specified in the IEEE standard for double-precision values. The software envelope
must utilize a super extended precision to achieve such error bounds.
Note that the binary to/from decimal conversions performed by the FPCP utilize the on-
chip ROM values of powers of 10 for speed and accuracy, thus allowing exact conversions
in many cases (particularly for values that are exact powers of 10).
4.4 CONDITIONAL TEST DEFINITIONS
The FPCP provides a very simple mechanism for performing conditional tests of the result
of any arithmetic floating-point operation. First, the condition code bits in the FPSR are set
or cleared at the end of any arithmetic operation or move operation to a single floating-
point data register. The condition code bits are always set consistently based on the result
FREESCALE
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MC68881/MC68882 USER'S MANUAL
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