Freescale Semiconductor MC68881 - Extension Field Encoding for Arithmetic Operations

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Table 4-13. Extension Field Encoding for Arithmetic Operations
Extension Field
Services Instruction Type MPU
$00 FMOVE to FPn Note 1
$01 FINT Note 1
$02 FSINH Note I
$03 FINTRZ Note 1
$04 FSQRT Note 1
$06 FLOGNP1 Note 1
$08 FETOXM1 Note 1
.,.
. $09 FTANH . . Note 1
.. $0A FATAN Note 1
$0C FASIN Note 1
$0D FATANH Note 1
$0E FSIN Note 1
$0F FTAN Note 1
$10 FETOX Note 1
$11 FTWOTOX Note 1
$12 FTENTOX Note 1
$14 FLOGN Note 1
$15 FLOG10 Note 1
$16
FLOG2
Note 1
NOTES:
Extension Reid
Instruction Type MPU
Services
$18 !FABS Note 1
$19 FCOSH Note 1
$1A FNEG Note 1
$1C FACOS Note 1
$1D FCOS Note 1
$IE FGETEXP Note 1
$1F ~FGETMAN Note 1
$20 FDIV Note 1
$21 'FMOD Note 1
$22 FAOD
Note I
$23 FMUL Note 1
$24 FSGLDIV Note 1
$25 FREM Note I
$26 FSCALE Note 1
$27 FSGLMUL Note 1
$28 FSUB Note 1
$30-$37 FSINCOS Note I
$38 FCMP Note 1
$3A FTST Note 1
$40-$7F [Undefined, Note 2
Reserved)
1. Two primitives can be issued for these
operations. If the operation is register-to-register, the first primitive issued is
null: If any exceptions, other than BSUN, are enabled, PC is set to one to request that the MPU pass the current program
counter. If the operation is external operand-to-register,
the first primitive is eva~uate effective address and transfer
data [with CA= 1, and PC= 1 if any exceptions other then BSUN are enabled). The second primitive is null (CA=0) to
terminate the instruction dialog.
2. The FPCP issues the take pre-instruction exception primitive with a vector number of 11 to instruct the MPU to take an
F-line emulator trap.
3. Some extension field encodings are unspecified, are redundant with valid instructions implemented by the FPCP, end
do not cause an F-line exception if executed. However, these encodings ere reserved for future definition by M, otorc!e,
and thus should not be generated by assemblers or compilers. The redundant encodings are: $05, SO7, SOB, $13, $17,
$1B, $29-$2F, $39, and $3B-$3F.
The destination register is encoded as shown in Table 4-12.
The source format field specifies the data format of the external operand. From the external
operand are derived the length (in bytes) of the operand and the allowed effective ad-
dressing modes. The FPCP decodes the source format field as listed in Table 4-14. The
extension field indicates the operation to be performed. Table 4-13 lists the extension field
encodings and functions. Also listed are services requested of the MPU by the FPCP.
4.7.1.3 MOVE CONSTANT TO FLOATING-POINT DATA REGISTER INSTRUCTIONS. The
FPCP constant ROM contains frequently used constants such as 0.0 and ?,. These instruc-
tions load a correctly rounded constant into a floating-point data register without an ex-
ternal data access.
FREESCALE
4-128
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