8
the request of the FPCP). In this case, the start-up timing numbers are added to the values
from the exception processing tables to determine the time required to begin
execution
of the exception handler.
The MPU terminates all instructions except FSAVE and FRESTORE by processing a null
(CA = 0) primitive (unless a mid-instruction exception occurs). Therefore, the timing values
in Table 8-10 should be included in the calculation of the effective execution time for the
MPU, where appropriate.
Table 8,10. Null Primitive Time Values
Primitive Type Best Case Cache Case i Worst Case
Null(CA=0) with no tracing
4~4"(0.0000) 44*(00000) ( 55*(100001 j
*Overlap is allowed for register-to-register and external-to-register instructions only
(OPCLASS 000
and
010).
8.5.2.2 TRANSFER OPERAND. Tabies 8-11 and 8-12 show the timing for the transfer of
an operand to or from the FPCP by the MPU. Table 8-11 shows the values for external
source or destination operands that reside in an MPU register or in memory, and Table 8-
12 shows the values for
immediate
source operands. For input transfers, the timing num-
bers shown include the time required by the MPU to process the evaluate effective address
and transfer data (with CA= 1) primitive, and for the FPCP to perform the internal transfer
of the operand to the execution unit. For the MPU, the last clock cycle of the transfer
operation and the processing for CA= 1 always overlaps with the input operand transfer
and conversion operations by the FPCP, and therefore, is not added to the overall execution
time for the instruction (although these operations are included in the calculation of the
effective execution time for the MPU).
Table 8-11. Operand Transfer Time -- External Operand
Transfer Type Operand Format
Byte word Long, Single Double
t Ex-t., Packed "
From MC68020
Dn 14/0 (0/0/0/1/1) 14/010/0,'0/1/1) 140 (00'0~1~1) -- i -- i
From Memory*
To MC68020
Dn
To
Memory**
19/0 {0/1/0/1/1)
17/0
(0/0/0/3/0)
19/0 (0/0/1/3/0}
19,'0 (0/1/0/1/1)
17/0 (0~0,'0'3'0)
19/0 (0"0'1 t3 0)
19'0101;0'1,.'1) 250 (020 1 2)
17,'0
(00'0'3'0)
19'0 (00'1 3 0) 250(00240)
t 310(00310) i
l - i
I 310(003 0t '
*Add the appropriate effective address calculation time. Eleven clocks of the MPU processing overlap with execution
by
the MC68881, which requires five or three clock cycles after the last coprocessor write cycle to comp!ete the
int~rn~l
transfer for double or any other format, respectively. Thus, reduce the numbers above by six clocks for double
or eight
clocks for
any other format for
calculation
of the overall
execution
time.
**Add the appropriate effective address calculation time. In the event the destination is packed decimal and a dynamTc
k
factor is used. add
14/0 (0/0/0/1/1).
Table 8-12. Operand Transfer Time -- Immediate Operand
Immediate Operand Format
Byte,
Word
Long,
Single
Double
Extended, Packed
Best Case
Cache Case
26'0 {00 '0'1 ,'3)
l Worst Case
170(1001 11
14/0 (00'0'1;1) 14 0 (0001'1)
18'0{0'0'0'1,1) 180(0001"1} i 190(1001 1)
22;0(000'12) 220(00012) t 240(20012}
260 (0001 3)
i 300(30013)
FREESCALE
8-26
MC68881/MC68882 USER'S MANUAL
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