SECTION 5
COPROCESSOR PROGRAMMING
This section describes the guidelines for programming Freescale's floating-point copro-
cessors. The first portion of the section presents the guidelines for applications program-
ming. it describes the concurrency with main processor instruction execution applicable
to both coprocessors, and the coprocessor instruction concurrency provided by the MC68882
coprocessor. It also discusses the optimization of code for the MC68882 coprocessor.
The second portion of the section discusses systems programming considerations. It de-
scribes the state frame sizes, and lists the instructions required in the exception handlers
for MC68881/MC68882 (FPCP) exceptions. The systems programming portion also de-
scribes the handling of exceptions by the MC68020/MC68030 (MPU) and FPCP combination,
and code that detects and identifies the coprocessor.
This section primarily describes programming of the MC68882 coprocessor, since programs
that run successfully in the MC68882 also run successfully in the MC68881. It is advisable
to program for the MC68882 even if the MC68881 is currently being used, so that no program
changes are required for upgrading to the MC68882.
5.1 APPLICATIONS PROGRAMMING
All applications programs that run successfully on the MC68881 can be used on the MC68882
without alteration, but optimization of code for the MC68882 provides significant reduction
in execution time. The following paragraphs describe the concurrency available with the
MC68881, the greater concurrency provided by the MC68882, and optimization techniques
for MC68882 programs.
5.1.1 Concurrency
The M68000 coprocessor interface, the MC68020 and MC68030 microprocessors, and the
MC68881 and MC68882 coprocessors are designed to provide the conventional sequential
instruction execution models while instruclions may actually be executed concurrently.
Applications programs can be written with no provisions for concurrency; the system
apparently executes the instructions in sequence. This apparent sequential execution is
automatic, and the programmer need not be concerned about it.
5.1.1.1 CONCURRENT INTEGER AND FLOATING-POINT COMPUTATIONS.
The M68000
coprocessor interface is designed to provide full support for the sequential instruction
execution model. Although the M68000 coprocessor interface allows concurrency between
coprocessor and main processor operations, the coprocessor must implement this con-
currency while maintaining a programming model based on sequential instruction execution.
After the main processor initiates a floating-point instruction (by writing to the command
CIR), it reads the response CiR. When the CA bit (bit [15] of the response CIR) is set, it
MC68881/MC68882 USER'S MANUAL
FREESCALE
5-1
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