4.8
INSTRUCTION FORMAT SUMMARY
The following paragraphs present a summary of the binary encodings for the FPCP in
-
struction set. The unique encoding for each instruction is shown explicitly, with the encoded
fields common to all of the instructions listed in a single table at the beginning of this
section.
4.8.1 Coprocessor
ID
Field
This field of each instruction specifies which one of eight (seven, for the MC68030) possible
coprocessors in a system is to perform the operation. There are no restrictions placed on
the value of the ID field by the main processor in the system; however, certain conventions
should be followed. Freescale assemblers default to coprocessor
lD=l for the FPCP. al
-
though directives are available to change this default. Furthermore, due to the hardware
implementation of the
MC68851 Paged Memory Management Unit, that device must be
assigned to coprocessor
ID=O if used in a system. Thus, the FPCP should not
be
assigned
to coprocessor
ID=O if it is anticipated that an MC68851 may be used in the system, or in
an
MC68030 system.
4.8.2 Effective Address Field
This field specifies the M68000 Family addressing mode that is to be used to locate operands
external to the FPCP {if required by the instruction). For some operations, restrictions are
placed on which of the available addressing modes are allowed. These restrictions are
enforced by hardware in the MPU and FPCP, and Freescale assemblers do not generate
operation words with disallowed effective addressing mode field encodings. The encodings
for this fields are shown in Table 4
-
21.
4.8.3 RegisterlMemory Field
This field is common to all of the arithmetic instructions and the FMOVE to FPn instruc
-
tion.
A
zero in this field indicates that the operation is register
-
to
-
register, and
a
one in
this field indicates that the source operand is external to the FPCP.
4.8.4 Source Specifier Field
This field is common to all of the arithmetic instructions and the FMOVE floating
-
point
data register instruction. The definition of this field is affected by the value of the
R
M
field:
If
RIM =0, it specifies the source floating
-
point data register, FPm.
If RIM
=
1,
it specifies the source operand data format:
000
L
Long Word lnteger
001
S
Single Precision Real
010
X
Extended Precision Real
011
P Packed Decimal Real
100 W Wordlnteger
101 D Double Precision Real
110
B
Byte lnteger
FREESCALE
4
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1 38
MC68881lMC68882 USER'S MANUAL
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