EasyManua.ls Logo

Freescale Semiconductor MC68881 - Page 296

Default Icon
409 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
7
The main processor services this primitive by writing an exception acknowledge to the
control CIR and initiating exception processing.
Note that the write of the exception acknowledge causes the response CIR encoding to be
changed to the null primitive, thus assuring that the take exception primitive is received
by the main processor while avoiding spurious request primitives in non-MPU based sys-
tems.
The MC68882 uses a similar dialog for pre-instruction exceptions. However, when the main
processor writes an exception acknowledge to the control CIR, the MC68882 does not enter
the idle state. Instead, the MC68882 retains the take pre-instruction exception primitive in
its response register. Any floating-point instruction other than an FSAVE (or an FRESTORE
of the null state) reports the same exception again. An FSAVE (or an FRESTORE of the null
state) restores the MC68882 to an idle state, allowing subsequent floating-point instructions
to execute. Figure 7-28 shows the dialog which includes the minimum instructions rec-
ommended for an exception handler. (Refer to 5.2.2 Exception Handler Code.)
Figure 7-29 shows the dialog that usually occurs when the handler for a pre-instruction
exception does not begin with an FSAVE instruction. A protocol violation could occur; in
which case, the dialog would not apply. Otherwise, as the dialog shows, at the completion
Of the exception handler routine, the main processor attempts to execute the same instruc-
tion again, and that
instruction
takes the same exception. If the exception handler included
a floating-point instruction but no preceding FSAVE instruction, the floating-point instruc-
tion would take the original exception again, nesting the repetitions of the exception han-
dler.
Figure 7-30 shows the dialog that applies when an exception handler does not set the
exception pending bit, even though it begins with an FSAVE instruction and closes with
an FRESTORE. A protocol violation cannot occur in this case, but because the exception
pending bit is not set, the instruction again takes the exception when it is reinitiated after
returning from the exception handler.
7.5.4.2 TAKE MID-INSTRUCTION EXCEPTION. The MC68881 uses this dialog only if an
exception occurs during the
execution
of the FMOVE FPm,<ea> instruction. In this
case,
the protocol for the normal execution of the instruction is followed, and then the mid-
instruction exception is reported with the last primitive (in lieu of the null primitive normally
used to terminate the dialog). The main processor services this primitive by writing an
exception processing acknowledge to the control CIR and initiating exception processing.
The dialog for this operation is shown in Figure 7-31. (For simplicity, this diagram assumes
that the destination data format is not packed decimal with a dynamic k factor.) Note that
a write of the exception acknowledge causes the response CIR encoding to be changed to
the null primitive, thus assuring that the take-exception primitive is received by the main
processor while avoiding a spurious request primitive in non-MC68020 or non-MC68030
based systems.
The MC68882 uses the mid-instruction exception if an exception occurs in the FMOVE
FPm,<ea> instruction, as the MC68881 does. However, since the MC68882 allows con-
current execution of floating-point instructions, an instruction that has begun execution
can report an exception caused by a previous instruction. When the previous instruction
FREESCALE
7-32
MC68881/MC68882 USER'S MANUAL

Table of Contents

Related product manuals