SECTION 8
INSTRUCTION EXECUTION TIMING
This section gives the instruction execution times for the MC68881/MC68882 (FPCP) in
terms of external clock cycles. This section provides the user with some reasonably accurate
execution timing guidelines, but not exact timings for every possible circumstance. This
approach is used since the exact execution time for an instruction is highly dependent on
such things as external data formats, input operand values, operand type combinations,
and timing relationships with respect t o the main processor. The timing numbers presented
in the following tables allow the assembly language programmer or compiler writer to
predict worst-case timings needed to evaluate the performance of the FPCP or to optimize
code for concurrent execution. Also, the effect that various data formats and operand values
have on execution times can be observed to allow optimizing data structures for the highest
performance for a given application. Finally, the timings for exception processing, context
switching, and interrupt processing are included so that designers of multitasking or real-
time systems can predict such things as task switch overhead and maximum interrupt
latency due to floating-point operations.
When binary real data formats are used and no register conflicts occur, the MC68882
performs the operand transfer and data conversion for most general type instructions
concurrently with calculations for preceding instructions. This section includes timing in-
formation that shows the amount of instruction overlap this concurrency provides.
8.1. FACTORS AFFECTING EXECUTION TIMES
When investigating instruction execution timing for the FPCP, it is assumed that the fol,
lowing information is required in order to make informed engineering trade-offs:
• Best case instruction execution timings, for determining whether or not an FPCP-based
system can meet certain data processing performance criteria.
• Worst-case instruction timings and how they affect execution concurrency, to allow
programs and compilers to be optimized to take maximum advantage of overlap under
any timing circumstances.
• Guidelines to indicate how various programming practices can be utilized to improve
upon the worst-case execution times, and thus allow performance to approach, as
closely as possible, the best case execution times for a given task.
• The
effects that an FPCP might have on system-related timings such as context switch
overhead time in multitasking systems, or interrupt latency time in a real-time system.
First of all, when defining the performance of any machine that can operate in an asyn-
chronous manner, or where data dependencies affect execution times, a set of assumptions
must be
made in order to provide a measurable environment. In this manual, instruction
execution times are shown in clock cycles to remove clock frequency dependencies, and
the following assumptions apply to define the context of the times shown.
• The main processor is an MC68020, acting as the host to the FPCP, and the two devies
use the same clock input.
MC68881/MC68882 USER'S MANUAL FREESCALE
8-1
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