Freescale Semiconductor MC68881 - Page 91

FCMP Compare FCMP
Instruction Format:
15 14 13
0 R/M 0
12 11 10 9 8 7 6 5 4 3 2 1 0
COPROCESSOR EFFECTIVE ADDRESS
1 IO 0 0 0 MODE I REGISTER
m
SOURCE DEST(NATION
SPECIFIER REGISTER 0 1 1 1 0 0 0
Instruction Fields:
Coprocessor ID Field -- Specifies which coprocessor in the system is to execute this
instruction. Freescale assemblers default to ID = 1 for the FPCP.
Effective Address Field -- Determines the addressing mode for external operands.
If R/M--0, this field is unused, and should be all zeros.
If R/M = 1, this field is encoded with an M68000 addressing mode as shown:
Addressing Mode Mode Register
Dn* 00O reg, number:Dn
An -- --
(An) 010 reg. number:An
IAn)+ 011 reg. number:An
-(An) 100 reg. number:An
(d16,An) 101 reg. number:An
(d8,An,Xn) 110 reg. number:An -
(bd,An,Xn) 110 reg. number:An
([bd,An,Xn],od) 110 reg, number:An
([bd,An],Xn,od) 110 reg. number:An
~Only
if <fmt> is Byte, Word, Long, or Single.
Addressing Mode
(xxx).W
(xxx).L
#<data>
(d16,PC)
(ds,PC,Xn)
(bd.PC.Xn)
(Ibd,PC,Xnl,od)
([bd,PC],Xn,od)
Mode Register
111 00O
111 00!
111 100
111 010
111 011
111 011
111 011
111 011
R/M Field -- Specifies the source operand address mode.
0 -- The operation is register to register.
1 -- The operation is <ea> to register.
Source Specifier Field -- Specifies the source register or data format.
If R/M =0, specifies the source floating-point data register, FPm.
If R/M = 1, specifies the source data format:
000 L , Long Word Integer
001 S Single Precision Real
010 X Extended Precision Real
011 P Packed Decimal Real
100 W Word Integer
101 D Double Precision Real
110 B Byte Integer
Destination Register Field -- Specifies the destination floating-point data register, FPn.
MC68881/MC68882 USER'S MANUAL FREESCALE
4-33