Operating System Boot, Sleep, and Wake ESB2 BMC Core TPS
Revision 1.0
Intel order number E18291-001
202
17.4.2.2 Wake On LAN Support
The BIOS supports Wake On LAN (WOL) as follows:
WOL supported from ACPI S1 sleep state.
WOL supported for onboard/embedded NIC devices and add-in NIC devices from ACPI
S5 soft off state without A/C power loss as long as they are configured correctly.
WOL supported for onboard/embedded NIC devices only from ACPI S5 soft off state
after A/C power loss.
The wake sources for S1 are configured entirely by the operating system using information in
the ACPI DSDT table. PCI devices (Intel
®
82563EB NIC) assert PME# signal for WOL when
enabled. PME# assertion causes an Out-Of-Band (OOB) wake event. PCI Express* cards also
cause wake event for WOL via PME messages or EXP_WAKE signal. PCI Express* cards
should support PME or EXP_WAKE assertion on WOL in order to wake the system.
The BIOS supports WOL from S5 and AC power loss through Onboard NICs only. The following
usage scenario is supported for WOL from S5:
System is powered up, booted to the operating system and it operates normally.
After sometime, the system is shutdown gracefully.
Then, the system is powered down to S5 state.
A\C power may be completely removed after the S5 transition.
At a later time, A\C power is restored. The system then resumes to h/w standby or S5.
At this point, the system is not powered up and is on stand by. The user wants to be able
to WOL this server.
The BIOS needs to properly configure wake events for WOL before entering S5 state for correct
wake operation. WOL is supported by platform hardware.
On-board NIC devices must also enable WOL and PME in default configuration at power-up to
properly perform WOL after A/C power loss.
17.5 Non-Maskable Interrupt (NMI) Handling
Non-maskable Interrupt (NMI) events are generated by two sources:
Front Panel NMI Button press
BIOS / Software Generated NMI
The Front Panel NMI Button is described in Section 17.3.3. The BIOS generates Software NMI
events during POST and runtime to halt the system in response to unrecoverable system errors.
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