Intel S7000FC4UR Technical Product Specification

BMC Functional Specifications ESB2 BMC Core TPS
Revision 1.0
Intel order number E18291-001
258
22.5.2 Fault Resilient Booting (FRB)
Fault resilient booting (FRB) is a set of BIOS and BMC algorithms and hardware support that
allow a multiprocessor system to boot even if the bootstrap processor (BSP) fails. Only FRB2 is
supported, using watchdog timer commands.
FRB2 refers to the FRB algorithm that detects system failures during the POST. The BIOS uses
the BMC watchdog timer to back up its operation during POST. The BIOS configures the
watchdog timer to indicate that the BIOS is using the timer for the FRB2 phase of the boot
operation.
After the BIOS has identified and saved the BSP information, it sets the FRB2 timer use bit and
loads the watchdog timer with the new timeout interval.
If the watchdog timer expires while the watchdog use bit is set to FRB2, the BMC (if so
configured) logs a watchdog expiration event showing the FRB2 timeout in the event data bytes.
The BMC then hard resets the system, assuming the BIOS selected reset as the watchdog
timeout action.
The BIOS is responsible for disabling the FRB2 timeout before initiating the option ROM scan
and before displaying a request for a boot password. If the processor fails and causes an FRB2
time-out, the BMC resets the system.
The BIOS gets the watchdog expiration status from the BMC. If the status shows an expired
FRB2 timer, the BIOS enters the failure in the system event log (SEL). In the OEM bytes entry
in the SEL, the last POST code generated during the previous boot attempt is written. FRB2
failure is not reflected in the processor status sensor value.
The FRB2 failure does not affect the front panel LEDs.
22.5.3 Processor Presence and Population Check
When the BMC detects an empty processor socket, it sets the disable bit in the processor status
sensor for that socket and clears the remaining status bits, including any persistent bits. See
section 22.15.1 for information about the processor status sensor. The BMC checks for
processor presence before the system is powered-on.
22.5.4 Processor Disabling
No processor error condition requires the BMC to disable a processor. There is no hardware
support for the BMC to disable a processor.
22.5.5 BSP Identification
The BMC cannot indicate which processor is the BSP. Software that needs to identify the BSP
should use the multiprocessor specification tables.
22.6 Integrated Front Panel User Interface
The front panel has the following indicators:
 Power LED

Intel S7000FC4UR Specifications

General

Brand	Intel
Model	S7000FC4UR
Category	Server
Language	English