Intel® Server System S7000FC4UR TPS BMC Functional Specifications
Revision 1.0
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22.14 General Sensor Behavior
22.14.1 Sensor Initialization
As part of the BMC initialization upon application of standby power or BMC reset, the BMC
enables a subset of its sensors. This is done before loading any SDRs. This allows some
amount of sensor functionality even if there are no SDRs present. Subsequent loading of SDRs
may change the configuration of these sensors.
The sensors that are enabled independently of an SDR load include:
Processor status sensors
DIMM sensors
PCI Express* link sensors
22.15 Processor Sensors
The BMC provides IPMI sensors for processors and associated components, such as voltage
regulators and fans. The sensors are implemented on a per-processor basis.
Table 103. Processor Sensors
Sensor Name Per-Proc
Socket
Description
Processor Status Yes Processor presence and fault state
Digital Thermal Sensor Yes Relative temperature reading via PECI.
Processor VRD Over-temperature
Indication
Yes Discrete sensor that indicates a processor VRD has
crossed an upper operating temperature threshold
Processor Voltage Yes Discrete sensor that indicates a processor power good
states.
Processor Thermal Control (Prochot) Yes Percentage of time a processor is throttling due to
thermal conditions
A processor’s Digital Thermal Sensor and Processor Thermal Control sensors will be disabled
whenever that processor is not physically present when the BMC’s SDR initialization agent
executes.
22.15.1 Processor Status Sensors
The BMC provides an IPMI sensor of type processor for monitoring status information for each
processor slot. Except for the processor presence offset, if an event state (sensor offset) has
been asserted, it remains asserted until one of the following happens:
A Rearm Sensor Events command is executed for the processor status sensor.
A Processor Retest command is executed. The BIOS sends this command to the BMC if
a user chose Processor Retest from the BIOS Setup utility.
AC power cycle occurs. This only clears persistent bits of the sensor if the processor is
not present.