Memory Riser Intel® Server System S7000FC4UR TPS
Revision 1.0
Intel order number E18291-001
52
Table 12. Supported Fully-Buffered DIMMs
Technology Organization SDRAM
chips/ DIMM
Capacity Rank
16M X 8 X 4bks 8 512MB Single
16M X 8 X 4bks 16 1GB Dual
32M X 4 X 4bks 16 1GB Single
512Mb
32M X 4 X 4bks 32 2GB Dual
32M X 8 X 8bks 8 1GB Single
32M X 8 X 4bks 16 2GB Dual
64M X 4 X 8bks 16 2GB Single
1Gb
64M X 4 X 8bks 32 4GB Dual
64M X 8 X 8bks 8 2GB Single
64M X 8 X 8bks 16 4GB Dual
128M X 4 X 8bks 16 4GB Single
2Gb
128M X 4 X 8bks 32 8GB Dual
4.1.4 Temperature Sensors, FRU, and SPD, BMC Bus
Temperature Sensor: A two package temperature-sensing device provides a sensor at
the left and right of the DIMM sockets. Server management sees this as one sensor,
measuring the temperature drop across the board, which estimates the heat generated
by the DIMMs.
Field Replaceable Unit: An EEPROM device provides 256 bytes of programmable
Field-Replaceable Unit (FRU) space. This FRU is programmed during manufacturing to
contain the board version and serial number but may also be programmed to meet other
integrator-specific needs.
Serial Presence Detect Bus: The Serial Presence Detect (SPD) bus is a low frequency
I
2
C chain that is routed to each FBD memory channel. The Chipset acts as a master for
the SPD bus.
BMC Bus: The BMC Bus is a low frequency I
2
C bus that routed to FRU unit, and
Optional Open Loop temperature sensor on the Memory Board.
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