Intel® Server System S7000FC4UR TPS BIOS Error Handling
Revision 1.0
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19.3 POST Progress Codes and Errors
The system BIOS complies with the EFI Framework POST Progress Code specification by
reporting 32-bit status codes at various points during POST that contain class, subclass, and
operation information. The class and subclass fields describe the type of hardware that is being
initialized. The operation field represents the specific initialization activity.
The system BIOS generates the following types of notifications during POST:
POST Error beep codes for fatal errors in early POST prior to video initialization
POST codes displayed on the system board diagnostic LED array
POST Error Manager
POST error codes are also logged in the BMC System Event Log (SEL).
19.3.1 POST Error Beep Codes
The BIOS notifies the user of fatal error conditions in early POST prior to system video
initialization using the following beep codes:
Table 92. POST Error Beep Codes
Beeps Error Message Description
3 Memory error System halted because a fatal error related to the memory was detected.
6 BIOS rolling back error The system has detected a corrupted BIOS in the flash part, and is rolling back to
the last good BIOS.
19.3.2 POST Codes
The system BIOS truncates 32-bit EFI POST Progress Codes to 8-bit values for display on the
system board Diagnostic LED array.
The resulting 8-bit POST code is displayed on the system board POST Code Diagnostic LED
array at the start of each configuration process. This information can be used to assist with
debugging system hangs during POST by identifying the last POST process initiated by the
BIOS.
Table 93. Post Codes and Messages
Progress Code Progress Code Definition
Host Processor
0x10 Power-on initialization of the host processor (Boot Strap Processor)
0x11 Host processor cache initialization (including AP)
0x12 Starting Application processor initialization
0x13 SMM initialization
Chipset
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