Main Board Server Management Intel® Server System S7000FC4UR TPS
Revision 1.0
Intel order number E18291-001
44
The power, reset, front panel NMI, and ID buttons are unprotected.
The BMC detects that the system has exited the ACPI S1 sleep state when it is notified by the
BIOS SMI handler.
3.3.6.2 S4 and S5 System State Support
Network adapters hold the wake configuration state for Wake On LAN (WOL). This is typically
configured by the operating system and is not cleared by a system reset. However, WOL date
information should be cleared when going into S4/S5 system state. When a WOL Magic Packet*
is received by the BMC, the system powers on if WOL is enabled in BIOS setup.
The WOL feature is supported for the onboard, IO Riser and PCI-Express* plug-in network
adapters.
3.3.7 Wake On LAN
Legacy Wake On LAN (WOL) is supported by multiple devices within the board set.
On the main board, the 82563EB and Enterprise Southbridge 2 MAC support wake on LAN. The
MAC will generate PE_WAKE# signal upon detecting a filter packet. PE_WAKE# is connected
to WAKE# pin of the Enterprise Southbridge 2 core via the platform. Upon receiving WAKE#,
the Enterprise Southbridge 2 suspend well logic will start resume power activity. It will
commence S4/S5 Exit process by reversing the process of S4/S5 Entry.
On the I/O riser, the 82575EA Gigabit Ethernet controller also supports WOL.
The 82575EA Gigabit Ethernet controller, which is a PCI-Express* based device, can generate
a wake event by asserting the WAKE# signal. The assertion of a WAKE# signal causes the
system to return to the ACPI S0 sleep state. Following is a detailed description of the 82575EA
controller wake operation.
“Advanced Power Management Wakeup”, or “APM Wakeup”, was previously known as “Wake
on LAN”. It is a feature that has existed in the 10/100 Megabit NICs for several generations. The
basic premise is to receive a broadcast or unicast packet with an explicit data pattern, and then
to assert a signal to wake-up the system.
In the earlier generations, this was accomplished by using a special signal that ran across a
cable to a defined connector on the motherboard. The NIC would assert the signal for
approximately 50ms to signal a wakeup.
The 82575EA Gigabit Ethernet controller uses (if configured to) an in-band PM_PME message
for this. On power-up, Intel
®
82575EB Gigabit Ethernet Controller will read the APM Enable bits
from the EEPROM Initialization Control Word 2 into the APM Enable (APME) bits of the Wakeup
Control Register (WUC). These bits control enabling of APM Wakeup. When APM Wakeup is
enabled, Intel
®
82575EB Gigabit Ethernet Controller checks all incoming packets for “Magic
Packets*”.
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