Main Board Intel® Server System S7000FC4UR TPS
Revision 1.0
Intel order number E18291-001
18
The TPM is a security device that connects to the Enterprise Southbridge 2 LPC bus. This
device allows private key generation and storage. In addition, it provides the ability to perform
various platform trust metrics and authentication procedures, as outlined in the Trusted Platform
Module Specification Version 1.2.
2.2.15 Serial Port Support
The SIO3 provides two serial communication ports:
Serial A
Serial B
Serial B is provided by Serial Interface2 to a DB9 connector on the rear panel of the main board.
Serial A is provided by Serial Interface1 to an internal unshielded 9-pin shrouded header (2 x 5,
with pin 10 removed for keying). The SIO3 also provides a serial interface that can be
connected to the Enterprise Southbridge 2 serial port for manageability purposes. The serial
port MUX can be configured within the SIO3 to monitor Serial B traffic or redirect serial traffic
from the internal serial port connector directly to the Enterprise Southbridge 2.
Serial B is available as an Emergency Management Port (EMP) for remote server management.
When used in this mode, it is unavailable to the BIOS/operating system. When server
management is setup for Serial Over LAN (SOL) remote server management, Serial B is also
unavailable to the BIOS/operating system. More information about the PC87427* SIO serial
ports can be obtained from the Winbond* vendor website.
2.2.16 LAN on Motherboard 1 (LOM1)
The Main board LOM1 utilizes the Enterprise Southbridge 2 MAC and Intel
®
82563EB Gigabit
Ethernet PHY (Physical Layer). The Enterprise Southbridge 2 links to the Intel
®
82563EB
Gigabit Ethernet PHY through a high-speed serial interface called Kumeran.
The Kumeran interface consists of two sets of Tx/Rx pairs for a total of eight signals. Intel
®
82563EB Gigabit Ethernet PHY outputs two Gbit LAN ports and will connect to a 1x2 RJ45 Gbit
connector accessible at the rear of the chassis.
2.2.17 Post Code LEDs
Eight light emitting diodes are used to indicate the raw binary output of BIOS POST codes.
Although the value sent to the POST Code LEDs may be the same as the port 80h value at
times during the POST process, it is not guaranteed. Table 6 shows the correlation the POST
Code bit to LED reference designator.
Table 6. Binary Code Definition
Bit 3 Bit 2 Bit 1 Bit 0 Hexadecimal
0 0 0 0 0
0 0 0 1 1
0 0 1 0 2
0 0 1 1 3