6 Master Summary 64 One or more enabled bits (0-5 or 7) are set in the
Status Byte Register and may generate a Request
for Service (RQS). Bits are enabled by the *SRE
command.
This bit is ignored (set to 0) by the *SRE com-
mand.
7 Standard Operation Sum-
mary
128 One or more enabled bits are set in the Standard
Operation Register (see STATus:OPERa-
tion:ENABle command).
l To enable specific bits, you must write a decimal value that corresponds to the binary-weighted sum of
the bits in the register. The selected bits are summarized in the "Master Summary" bit (bit 6) of the
Status Byte Register. If any of the selected bits change from 0 to 1, the instrument generates Service
Request signal.
l Use the <enable_value> parameter to specify which bits will be enabled. The decimal value specified cor-
responds to the binary-weighted sum of the bits you wish to enable in the register. For example, to
enable bit 3 (decimal value = 8) and bit 5 (decimal value = 32), the corresponding decimal value would
be 40 (8 + 32).
l The *CLS (clear status) command will not clear the enable register but it does clear all bits in the event
register.
l A STATus:PRESet, SYSTem:PRESet, *CLS, or *RST command does not clear the bits in the Status Byte
enable register.
Return Format
The query reads the enable register and returns a decimal value which corresponds to the binary-
weighted sum of all bits set in the register. For example, if bit 3 (decimal value = 8) and bit 5 (decimal value
= 32) are enabled, the query will return +40.
Examples
The following example enables bit 4 (decimal value = 16) in the enable register.
*SRE 16
The following query returns which bits are enabled in the register.
*SRE?
Typical Response: +16
See Also
*ESE
*STB?
STATus:OPERation:ENABle
*SRE
196 Keysight 53220A/53230A Programmer's Reference
To Next Page
Loading...
