Set Value Generators
Parameter manual b maXX BM5800
Document No.: 5.16029.03 Baumüller Nürnberg GmbH
364
of 814
3.6
Comments:
m Bits 0 to 2:
The internal processing sequence of the bits is as follows:
1. Blocking of positive or negative set values (bit 0 or 1)
2. Polarity reversal of current set value (bit 2)
m Bit 6:
The speed synchronization is activated as standard by Z110.2– Mode bit 6 = 0.
It acts when the ramp function generator is activated, e.g., by changing over or activat-
ing operating mode -3 (speed control), so that no jump in speed occurs.
5 Selection of input parameter
0: 110.4 input 32-bit resolution (100% = 40000000
hex
)
1: 110.5 input 16-bit resolution (100% = 4000
hex
)
6 1: Actual speed value synchronization switched off
7 Z110.8– Quick stop time applies to:
0: Change of set value from 100% 0%
1: Change of set value from effective set value at ramp function generator
output
Z110.3– 0%
9 ... 8 Behavior at run over hardware limit switch at active limit switch monitor-
ing:
0: Error message
1: Error message; stop at deceleration ramp, if error reaction = „no reac-
tion“
2: No error message; no stop
3: No error message; stop at deceleration ramp
10 1: Transparency mode on
11 1: Input set value interpolator on
12 Speed profile in zero-crossing at change of direction
0: No rounding-off of the speed, i.e. maximum permissible acceleration at
speed
= 0
1: Rounding-off of the speed at zero-crossing, i.e. acceleration = 0 at
speed
= 0
13 Z110.21– SS1 stop time applies to:
0: Change of set value from effective set value to 0%
1: Change of set value from 100% to 0%
14 1: Quick stop is always with a trapezoidal speed profile
15 Reserved
16 Selection of the set value processing task:
0: RT1 task with a cycle time of 1 ms
1: Fieldbus task with a settable cycle time
31 … 17 Reserved
Bit Meaning
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