FMOVE
Move Floating
-
point Data Register
FMOVE
Exception Byte:
BSUN
SNAN
OPERR
OVFL
UNFL
Cleared
Refer to
4.5.4
NANs.
Cleared
Cleared
Refer to
6.1.5
Underflow
if the source is an
extended precision denormalized number;
cleared otherwise.
Cleared
Refer to
6.1.7
lnexact Result
if <fmt> is L,
D
or
X;
cleared otherwise.
Refer to
6.1.8 lnexact Result on Decimal Input
if <fmt> is
P;
cleared otherwise.
Accrued Exception Byte: Affected as described in
6.1.10 IEEE Exception and Trap Com
-
patibility
lnstruction Format:
lnstruction Fields:
Coprocessor
ID
Field
-
Specifies which coprocessor
in
the system is to execute this
instruction. Freescale assemblers default to ID=
I
for the
FPCP.
Effective Address
Field
-
Determines
the
addressing mode for external operands.
If
RIM
=0,
this field is unused, and should be all zeros.
If
RIM
=
1,
this field is encoded with an
M68000
addressing mode as shown:
1514131211109
8
7
6
5
4
3
2
10
Addressing Mode
Dn*
An
0
0
(An)
(An)
+
-(An)
0
1111
Mode
000
-
(di6.h)
(d~,An,Xn)
(bd.An.Xnl
Register
Addressing Mode
1
'
:::
(xxx1.W
(xxx).L
#<data> 111
7
DO
COPROCESSOR
ID
EFFECTIVE AOORESS
Register
reg.
number:Dn
-
010
011
100
Ilbd.An,Xnl.od)
/
110
/
reg. number:An
MC68881lMC68882 USER'S MANUAL
0
MODE
0000000
reg.
number:An
reg. number:An
reg.
number:An
101
110
110
(lbd,Anl,Xn,odl
1
110
FREESCALE
4
-
65
REGISTER
SOURCE
SPECIFIER
reg.
number:An
reg. number:An
req. number:An
reg. number:An
RIM
DESTINATION
REGISTER
*Only if
<frnt> is Byte, Word, Long, or Single.
0
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