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Freescale Semiconductor MC68881 - Page 125

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FMOVE Move
Floating-Point Data Register
FMOVE
<fmt> is S, D, or X
BSUN Cleared
SNAN Refer to 4.5.4 NANs.
OPERR Cleared
OVFL Refer to 6.1.4 Overflow.
UNFL Refer to 6.1.5 Underflow.
DZ Cleared
INEX2 Refer to 6.1.7
Inexact Result.
INEX1 Cleared
<fmt> is P
BSUN Cleared
SNAN Refer to 4.5.4 NANs.
OPERR Set if the k-factor > + 17, or the magnitude of
the decimal exponent exceeds 3 digits; cleared
otherwise
OVFL Cleared
UNFL Cleared
DZ Cleared
INEX2 Refer to 6.1.7
Inexact Result,
INEX1 Cleared
Accrued Exception Byte: Affected as described in 6.1.10
IEEE Exception and
Trap Com-
patibility
Instruction Format:
15 14 13 12 fl 10 9 8 7 6 5 4 3 2 1
~_ COPROCESSOR EFFECTIVE ADDRESS
] 1 IO 0 0 0 MOOE I REGISTER
/
DESTINATION SOURCE K-FACTOR
1 FORMAT REGISTER (IF REQUIRED)
Instruction Fields:
Coprocessor ID Field -- Specifies which coprocessor in the system is to execute this
instruction. Freescale assemblers default to ID-- 1 for the FPCP.
MC68881/MC68882 USER'S MANUAL FREESCALE
4-67

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