--E--
Encodings,
Evaluate Effective Address and Transfer Data
Primitive, 7-14
Null Primitive, 7-11
End Phase, 6-38
Errors, Operand, 6-7, 6-8
Evaluate Effective Address and Transfer Data
Primitive, 7-14
Encodings, 7-14
Format, 7-13
Example,
Coprocessor Identification, 5-16
Early Chip
Select Logic, 10-8
Idle State Frame Access, 5-13
Late Chip Select Logic, 10-9
MC68881 Instruction Overlap, 8-22, 8-23
MC68882 Performance Improvement, 5-10
Minimum Exception Handler, 5-12
Reset Logic, 10-6
Sense Device Circuit, 9-5
Timing Calculation, 8-16
Transfer Multiple Coprocessor Registers, 7-16
EXC Byte, 2-6, 6-5, 6-19, 6.34, 6-35
EXC_PEND Bit, 5-11, 6-33
Exception,
Address Error, 6-27
Branch/Set on Unordered, 6-5
BSUN, 6-5
Bus Error, 6-27
Coprocessor Condition Trap Instruction, 6-24
Coprocessor-Detected Protocol Violation, 6-20
Divide-by-Zero, 6-14
DZ, 6-14
Format Error, 6.28
Illegal Command Word, 6-20
Illegal Instruction, 6-24
Inexact
Decimal Result, 6-18
Result, 6.15
INEX1, 6-18
INEX2, 6-15
Interrupt, 6-26
MPU-Detected Protocol Violation, 6-25
Operand Error, 6-7
OPERR, 6-7
Overflow, 6.9
OVFL, 6-9
Privilege Violation, 6-27
Signaling Not-A-Number, 6.6
SNAN, 6-6
Trace, 6-25
Underflow, 6.11
UNFL, 6-11
Exception
Enable Byte, 1-4, 2-2, 6-5
Handler Code, 5-11
Handlers, MC68882, 6-28
Handling Times, 8-36
Processing, 5-14, 6-1
Dialogs, 7-30
Times, 8-39
Recovery, 6-22
Status Byte, 1-4, 2-6, 6-4
Vector
Assignments, 6-4
Numbers, 7-17
Exceptions,
Coprocessor-Detected, 6-2
MPU-Detected, 6-24
Multiple, 6-19
Execution Times,
Conditional Instructions, 8-18
FMOVE FPcr and FMOVEM Instructions, 8-17
FSAVE and FRESTORE Instructions, 8-19
MC68882 FMOVE Instructions, 5-10
Execution Timing
Assumptions, 8-1
Factors, 8-1
Tables, 8-10
Exponent Sizes, 1-11
Extended Precision Format, 3-12
Conversion, 3-8
Extension Field Encoding, 4-128, 4-131
External-to-Register Instructions, 4-127
Dialog, 7-23
MC68882, 7-24
Format, 4-127
--F--
Factors, Execution Timing, 8-1
FC0-FC2 Signals, 10-7
Field,
Conditional Predicate, 4-139
Coprocessor |D, 4-138
Destination Register, 4-139
Effective Add ress, 4-138
Register/Memory, 1-138
Source Specifier, 4-138
Flags, BIU, 5-11, 6-33, 6-35
F-Line Emulator Exception Dialog, 7-39
Floating-Point
Computations, Concurrent, 5-1, 6-2
Control Register, 2-2, 2-3, 6-4, 6-19, 10-6
Data Register, 2-1
Formats, 1-10, 3-2
Instruction Address Register, 2-8, 6-21, 7-7, 7-26,
7-28, 7-35
Status Register, 2.4-2-7, 6-4, 6-19, 10-5
FMOVE FPcr and FMOVEM Instructions Execution
Times, 8-17
Format,
Busy State Frame,
MC68881, 6-30
MC68882, 6-31
Conditional Branch Instruction, 4-135
Conditional Instruction, 4-133
Constant-to-Register Instruction, 4-129
FREESCALE
INDEX-4
MC68881/MC68882 USER'S MANUAL
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