Freescale Semiconductor MC68881 - Page 399

Format, (Continued)
Coprocessor Instruction, 4-125
D, 3-11
Double Precision, 3-11
Dual Monadic Operation Instruction Format, 4-4
Dyadic Operation Instruction, 4-2
Evaluate Effective Address and Transfer Data
Primitive, 7-13
Extended Precision, 3-12
External-to-Register Instruction, 4-127
FRESTORE Instruction, 4-137
FSAVE Instruction, 4-137
General Type Instruction, 4-16
Idle State Frame,
MC68881, 6-30
MC68882, 6-31
Instruction Description, 4-14
Intermediate Result, 6-16
Internal, 3-7
Monadic Operation Instruction, 4-3
Move Control Registers Instruction, 4-130
Move Multiple FPn Registers Instruction, 4-131
Null Primitive, 7-11
Null State Frame, 6-30, 6-31
P, 3-13
Packed Decimal Real, 1-11, 3-7, 3-13
Register-to-External Instruction, 4-129
Register-to-Register Instruction, 4-127
Response Primitive, 7-10
S, 3-10
Single Precision, 3-10
Take Mid-Instruction Exception Primitive, 7-18
Take Pre-lnstruction Exception Primitive, 7-17
Transfer Multiple Coprocessor Registers
Primitive, 7-15
Transfer Single Main Processor Register
Primitive, 7-14
X, 3-12
Format Conversion,
Extended Precision, 3-8
Other, 3-9
Format Error Exception, 6-28
Format Exception Dialog,
FRESTORE Instruction, 7-41
FSAVE instruction, 7-40
Format Summary, 1-12, 1-13
Format Word Definitions, 6-37
Formats,
Binary Real, 3-2
Data. 1-11 3-1
Floating-Point, 1-11, 3-2
Integer, 1-11, 3-1
State Frame, 6-29
FPCC, 2-4
FPCR, 2-2, 2:3, 6-4, 6-19, 10-6
FPIAR Register, 2-8, 6-23, 7-8, 7-27, 7-28, 7-39
FPSR, 2-4-2-6, 6-4, 6-18, 10-6
FRESTORE Instruction
Dialog, 7-30
Format, 4-137
Exception Dialog, 7-40
Overview, 6-29
Protocol, 6-38
FSAVE and FRESTORE Instructions Execution
Times, 8-19
FSAVE Instruction
Dialog, 7-29
Format, 4-137
Exception Dialog, 7-39
Overview, 6-29
Protocol, 6-36
FSGLDIV Instruction, 4-17
FSGLMUL Instruction, 4-17
Fully-Concurrent Instructions, 5-6
Function Code Signals, 10-7
--G--
General Description, 1-1
General Type Instruction
Dialogs, 7-21
Command Word, 4-126
Format, 4-15
GND Pin Assignments, 9-6
H
Hardware Overview, 1-2
IA Bit, 7-11
Identification. Coprocessor, 5-15
Idle Phase, 6-38
Idle State Frame, 6-32
Access Example, 5-13
Format,
MC68881, 6-30
MC68882, 6-31
IEEE
Aware Tests, 4-11
Exception Compatibility, 6-19
Nonaware Tests, 4-10
Trap Compatibility, 6-19
Illegal
Command Word Exception, 6-20
Instruction Exception, 6-24
Inexact
Decimal Result Exception, 6-18
Result Exception, 6-16
INEX1 Exception, 6-18
INEX2 Exception, 6-15
Infinities, 3-5
Information, Ordering, 13-1
MC68881/MC68882 USER'S MANUAL FREESCALE
INDEX-5