Freescale Semiconductor MC68881 - Page 68

4
4.4.1 IEEE Nonaware Tests
All of the conditional tests in the following table, except EQ and NE, set the BSUN bit in
the status register exception byte if the NAN condition code bit is set when a conditional
instruction is executed.
Mnemonic DefinRion Equation Predicate
EQ Equal Z 000001
NE Not Equal Z 001110
GT Greater Than NANvZvN 010010
NGT Not Greater Than NANvZvN 011101
GE Greater Than or Equal Zv(NANvN) 010011
NGE Not (Greater Than or Equal) NANv(NAZ) 011100
LT Less Than NA(NANvZ} 010100
NLT Not Less Than NANv(ZvN) 011011
LE Less Than or Equal Zv(NANAN} 010101
NLE Not (Less Than or Equal) ' NANv(Nv~) ' 011010
GL Greater or Less Than NANvZ 010110
NGL Not {Grealer or Less Than) NANvZ 011001
GLE NAN 010111
NGLE
where:
Greater, Less or Equal
Not (Greater, Less or Equal}
NAN
"v" = Logical OR
"A" = Logical AND
011000
FREESCALE
4-10
MC68881/MC68882 USER'S MANUAL