4
FADD Add FADD
Operation:
Source + FPn 0 FPn
Assembler
FADD.<fmt> <ea>,FPn
Syntax:
FADD.X FPm,FPn
Attributes:
Format= (Byte, Word, Long, Single, Double, Extended, Packed)
Description:
Converts the source operand to extended precision (if necessary) and adds
that number to the number contained in the destination floating-point data register.
Stores the result in the destination floating-point data register.
Operation Table:
~ Source In Range Zero
Infinity
Destination
~ + - + - + -
In Range Add Add ~ inf - inf
+ ~-0.0 0.01
Zero Add 0.01 - 0.0 - inf - inf
+ + inf ~ inf + inf NAN 2
Infinity _ - inf - inf NAN 2 - inf
NOTES:
1. Returns +0.0 in rounding modes.RN, R2, and RP; returns -0.0 in RM.
2. Sets the OPERR bit in the FPSR exception byte,
3. If either operand is a NAN, refer to 4.5.4 NANs for more information.
Status Register:
Condition Codes:
Quotient Byte:
Exception Byte:
Accrued Exception Byte:
Affected as described in 4.5.5.1 SETTING FLOATING-POINT
CONDITION
CODES.
Not affected
BSUN
SNAN
OPERR
OVFL
UNFL
DZ
INEX2
INEX1
Cleared
Refer to 4.5.4
NANs.
Set if the source and the destination are
opposite-signed infinities; cleared otherwise.
Refer to 6.1.4 Overflow.
Refer to 6.1.5 Underflow.
Cleared
Refer to
6.1.7 Inexact Result.
If <fmt> is Packed, refer to 6.1.8 Inexact
Result
on
Decimal Input; cleared otherwise.
Affected as described in 6.1.10 IEEE
Exception and
Trap
Compatibility.
FREESCALE
4-22
MC68881/MC68882 USER'S MANUAL
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