Figure 78: Automatic restart failed- voltage restored after the set time 154
Figure 79: Start inhibition example 1 159
Figure 80: Start inhibition example 2 160
Figure 81: Time between starts 161
Figure 82: 3 phase VTs and Anti-Backspin (remanent phase-phase) VT configuration 162
Figure 83: REF protection for delta connected winding 168
Figure 84: REF protection for star connected winding 168
Figure 85: Three-slope REF bias characteristic 170
Figure 86: High Impedance REF principle 170
Figure 87: High impedance REF connection 171
Figure 88: REF bias characteristic 172
Figure 89: Low Impedance REF Scaling Factor 175
Figure 90: Circuit Breaker Fail logic - three phase start 183
Figure 91: Circuit Breaker Fail logic - single phase start 184
Figure 92: Circuit Breaker Fail Trip and Alarm 184
Figure 93: Undercurrent and Zero Crossing Detection Logic for CB Fail 185
Figure 94: CB Fail SEF Protection Logic 186
Figure 95: CB Fail Non Current Protection Logic 187
Figure 96: Circuit Breaker mapping 188
Figure 97: CB Fail timing 190
Figure 98: Undervoltage - single and three phase tripping mode (single stage) 205
Figure 99: Overvoltage - single and three phase tripping mode (single stage) 208
Figure 100: Residual Overvoltage logic 211
Figure 101: Residual voltage for a solidly earthed system 212
Figure 102: Residual voltage for an impedance earthed system 213
Figure 103: Negative Sequence Overvoltage logic 214
Figure 104: Positive Sequence Undervoltage logic 216
Figure 105: Positive Sequence Overvoltage logic 217
Figure 106: Moving Average undervoltage logic 218
Figure 107: Moving Average overvoltage logic 219
Figure 108: Moving Average zero sequence voltage logic 219
Figure 109: Moving Average positive sequence voltage logic 220
Figure 110: Moving Average negative sequence voltage logic 220
Figure 111: Average Voltage Protection blocking 220
Figure 112: Underfrequency logic (single stage) 225
Figure 113: Overfrequency logic (single stage) 227
Figure 114: Power system segregation based upon frequency measurements 228
Figure 115: Independent rate of change of frequency logic (single stage) 229
Figure 116: Frequency-supervised rate of change of frequency logic (single stage) 232
Figure 117: Frequency supervised rate of change of frequency protection 233
P24xM Table of Figures
P24xM-TM-EN-2.1 xix
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