GE P24DM User Manual

Figure 197: Autoreclose Shot Counters logic diagram (Module 41) 337
Figure 198: CB Control logic diagram (Module 43) 338
Figure 199: Circuit Breaker Trip Time Monitoring logic diagram (Module 53) 339
Figure 200: AR Lockout Logic Diagram (Module 55) 340
Figure 201: Reset Circuit Breaker Lockout Logic Diagram (Module 57) 341
Figure 202: Pole Discrepancy Logic Diagram (Module 62) 342
Figure 203: Circuit Breaker Trip Conversion Logic Diagram (Module 63) 343
Figure 204: Check Synchronisation Monitor for CB closure (Module 60) 344
Figure 205: Voltage Monitor for CB Closure (Module 59) 345
Figure 206: Three-phase Autoreclose System Check Logic Diagram (Module 45) 347
Figure 207: CB Manual Close System Check Logic Diagram (Module 51) 348
Figure 208: Circuit Breaker Fail logic - part 1 357
Figure 209: Circuit Breaker Fail logic - part 2 358
Figure 210: Circuit Breaker Fail logic - part 3 359
Figure 211: Circuit Breaker Fail logic - part 4 360
Figure 212: CB Fail timing 362
Figure 213: Phase Overcurrent Protection logic diagram 368
Figure 214: Negative Phase Sequence Overcurrent Protection logic diagram 370
Figure 215: IDG Characteristic 373
Figure 216: Earth Fault Protection logic diagram 375
Figure 217: EPATR B characteristic shown for TMS = 1.0 378
Figure 218: Sensitive Earth Fault Protection logic diagram 378
Figure 219: Current distribution in an insulated system with C phase fault 379
Figure 220: Phasor diagrams for insulated system with C phase fault 380
Figure 221: Positioning of core balance current transformers 381
Figure 222: High Impedance REF principle 382
Figure 223: High Impedance REF Connection 383
Figure 224: Thermal overload protection logic diagram 385
Figure 225: Spreadsheet calculation for dual time constant thermal characteristic 386
Figure 226: Dual time constant thermal characteristic 386
Figure 227: Broken conductor logic 389
Figure 228: Transient Earth Fault Logic Overview 393
Figure 229: Fault Type Detector Logic 394
Figure 230: Direction Detector Logic - Standard Mode 394
Figure 231: TEFD output alarm logic 394
Figure 232: Undervoltage - single and three phase tripping mode (single stage) 399
Figure 233: Overvoltage - single and three phase tripping mode (single stage) 402
Figure 234: Residual Overvoltage logic 406
Figure 235: Residual voltage for a solidly earthed system 407
Figure 236: Residual voltage for an impedance earthed system 408
Table of Figures P543i/P545i
xxx P54x1i-TM-EN-1

GE P24DM Specifications

General

Brand	GE
Model	P24DM
Category	Control Unit
Language	English