Intel® Server System S7000FC4UR Table of Contents
Revision 1.0
xi
19.3 POST Progress Codes and Errors ...................................................................... 235
19.3.1 POST Error Beep Codes ..................................................................................... 235
19.3.2 POST Codes........................................................................................................ 235
19.3.3 POST Error Manager Messages and Handling ................................................... 238
20. New Technologies............................................................................................................247
20.1 Intel
®
I/O Acceleration Technology (Intel
®
I/OAT)................................................ 247
20.2 Trusted Platform Module (TPM) Security............................................................. 247
20.2.1 TPM Security BIOS.............................................................................................. 247
20.2.2 Physical Presence ............................................................................................... 248
20.2.3 TPM Security Setup Options ............................................................................... 248
20.3 Internet SCSI (iSCSI)........................................................................................... 249
21. Baseboard Management Controller (BMC) ....................................................................250
21.1 ESB2 South Bridge.............................................................................................. 250
21.1.1 ESB2 Baseboard Management Controller Functionality ..................................... 251
22. BMC Functional Specifications.......................................................................................252
22.1 Power System...................................................................................................... 252
22.1.1 Power Supply Interface Signals........................................................................... 252
22.1.2 Power-Good Dropout........................................................................................... 252
22.1.3 Power-up Sequence ............................................................................................ 253
22.1.4 Power Down Sequence ....................................................................................... 253
22.1.5 Power Control Sources........................................................................................ 253
22.1.6
Power State Retention
......................................................................................... 254
22.1.7 Power State Restoration...................................................................................... 254
22.1.8 Wake-On-LAN (WOL).......................................................................................... 254
22.2 Advanced Configuration and Power Interface (ACPI) ......................................... 255
22.2.1 ACPI Power Control............................................................................................. 255
22.2.2 ACPI State Synchronization ................................................................................255
22.2.3 ACPI Power State Notify...................................................................................... 256
22.3 System Reset Control.......................................................................................... 256
22.3.1 Reset Signal Output............................................................................................. 256
22.3.2 Reset Control Sources......................................................................................... 256
22.3.3 Front Panel System Reset................................................................................... 256
22.3.4 Soft Reset and Hard Reset.................................................................................. 257
22.3.5 BMC Command to Cause System Reset............................................................. 257
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