Intel® Server System S7000FC4UR TPS BIOS Initialization
Revision 1.0
111
Branch 0 Branch 1
Configuration RAS
Board A Board B Board C Board D
DC6_ABCD S, M
DIMM_1
DIMM_2
DIMM_3
DIMM_4
DIMM_5
DIMM_6
DIMM_1
DIMM_2
DIMM_3
DIMM_4
DIMM_5
DIMM_6
DIMM_1
DIMM_2
DIMM_3
DIMM_4
DIMM_5
DIMM_6
DIMM_1
DIMM_2
DIMM_3
DIMM_4
DIMM_5
DIMM_6
DC8_AB S
DIMM_1
DIMM_2
DIMM_3
DIMM_4
DIMM_5
DIMM_6
DIMM_7
DIMM_8
DIMM_1
DIMM_2
DIMM_3
DIMM_4
DIMM_5
DIMM_6
DIMM_7
DIMM_8
× ×
DC8_ABCD S, M
DIMM_1
DIMM_2
DIMM_3
DIMM_4
DIMM_5
DIMM_6
DIMM_7
DIMM_8
DIMM_1
DIMM_2
DIMM_3
DIMM_4
DIMM_5
DIMM_6
DIMM_7
DIMM_8
DIMM_1
DIMM_2
DIMM_3
DIMM_4
DIMM_5
DIMM_6
DIMM_7
DIMM_8
DIMM_1
DIMM_2
DIMM_3
DIMM_4
DIMM_5
DIMM_6
DIMM_7
DIMM_8
All dual-channel configurations that involve Memory Riser Board A and B require that adjacent
DIMMs, Board A {DIMM_m} and Board_B {DIMM_m} are identical in size, organization, timing
and electrical characteristics.
All dual-channel configurations that involve Memory Riser Board C and D require that adjacent
DIMMs, Board C {DIMM_m} and Board_D {DIMM_m} are identical in size, organization, timing
and electrical characteristics.
Other rules for mirroring, sparing, single and dual-channel, described in sections 14.2.4 to
14.2.6 also apply.