MAX32660 User Guide
Maxim Integrated Page 116 of 195
The timer period event occurs on the timer clock TMRn_CNT = TMRn_CMP. The timer peripheral automatically performs
the following actions when an end of timer period event occurs:
1. The value in TMRn_CNT is reset to 0x0000 00001. The timer remains enabled and continues incrementing.
2. The timer interrupt bit TMRn_INT.irq will be set. An interrupt is generated if the IRQ is enabled.
10.8.2 Configuration
Configure the timer for Capture mode by doing the following:
1. Disable the timer by setting TMRn_CN.ten to 0.
2. Select Counter mode by setting TMRn_CN.tmode to 010b.
3. Set TMRn_CN.pres3:TMRn_CN.pres to set the prescaler that determines the timer frequency.
4. If using the timer pin:
a. Configure the pin as a timer output and configure the electrical characteristics as needed.
b. Set TMRn_CN.tpol to match the desired (inactive) state.
5. If using the timer interrupt, enable the interrupt and set the interrupt priority.
6. Write the initial value to TMRn_CNT. This effects only the first period; subsequent periods always begin with
0x0000 0001.
7. Write the compare value to TMRn_CMP.
8. Set TMRn_CN.ten = 1 to enable the timer.
The timer period is calculated using the following equation:
Equation 10-7: Capture Mode Elapsed Time
Note: The capture elapsed time calculation is only valid after the capture event occurs, and the timer stores the captured
count in the TMRn_PWM register.
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