Maxim Integrated MAX32660 - Table 4-32: Low Power Voltage Control Register

MAX32660 User Guide
Maxim Integrated Page 47 of 195
4.15.1 Power Sequencer Register Details
Table 4-32: Low Power Voltage Control Register
Low Power Voltage Control Register
PWRSEQ_LP_CTRL
[0x0000]
Bits
Name
Access
Reset
Description
31:26
-
R/W
0
Reserved for Future Use
Do not modify this field.
25
vddio_por_dis
R/W
0
V
DDIO
Power-On-Reset Monitor Disable
Set this field to 1 to disable the V
DDIO
POR monitor.
0: V
DDIO
POR Enabled
1: V
DDIO
POR Disabled
24:21
-
R/W
0
Reserved for Future Use
Do not modify this field.
20
vcore_svm_dis
R/W
0
V
CORE
Supply Voltage Monitor Disable
Set this field to 1 to disable the V
CORE
SVM.
0: V
CORE
SVM Enabled
1: V
CORE
SVM Disabled
19:17
-
R/W
0
Reserved for Future Use
Do not modify this field.
16
ldo_dis
R/W
See
Description
LDO Disable
This field initializes to 1 on a Power-On Reset until the hardware determines if an
external power source is connected to the V
CORE
pin. If no power supply is
connected, this bit is set to 0 by the hardware. If a power supply is connected to
V
CORE
, the bit remains set to 1.
Set this field to 1 to manually disable the LDO.
0: LDO Enabled.
1: LDO Disabled. Default after a POR.
15:13
-
R/W
0
Reserved for Future Use
Do not modify this field.
12
vcore_por_dis
R/W
1
V
CORE
POR Disable for DEEPSLEEP and BACKUP Mode
Setting this bit to 1 blocks the Power-On-Reset signal to the core when the
device is in DEEPSLEEP and BACKUP mode operation. Disconnecting the POR
signal from the core during DEEPSLEEP and BACKUP modes prevents the core
from detecting a POR event while the device is in DEEPSLEEP or BACKUP mode.
0: POR signal is connected to the core during DEEPSLEEP and BACKUP mode.
1: POR signal is not connected to the core during DEEPSLEEP and BACKUP
mode.
11
bg_off
R/W
1
Band Gap Disable for DEEPSLEEP and BACKUP Mode
Setting this field to 1 powers off the Bandgap during DEEPSLEEP and BACKUP
mode.
0: System Bandgap (SVM) is on in DEEPSLEEP and BACKUP modes
1: System Bandgap (SVM) is off in DEEPSLEEP and BACKUP modes.
10
fast_wk_en
R/W
0
Fast Wakeup Enable for DEEPSLEEP Mode
Set to 1 to enable fast wakeup from DEEPSLEEP mode. When enabled, the
system exits DEEPSLEEP mode faster by:
• Bypassing the 8kHz RO warmup
• Reducing the warmup time for the High-Frequency Internal Oscillator.
• Reducing the warmup time for the LDO.
0: Fast Wakeup Mode Disabled
1: Fast Wakeup Mode Enabled