Maxim Integrated MAX32660 - Table 4-7: Instruction Cache Controller Register Addresses and Descriptions; Table 4-8: ICC Cache ID Register; Table 4-9: ICC Memory Size Register

MAX32660 User Guide
Maxim Integrated Page 31 of 195
4.8.3 Flushing the ICC0 Cache
The System Configuration Register (GCR_SCON) includes a field for flushing ICC0. Setting GCR_SCON.ccache_flush to 1
performs a flush of ICC0. Set the ICC0_INVALIDATE register to 1 to invalidate the ICC0 cache
and force a cache flush. Read the ICC0_CACHE_CTRL.ready field until it returns 1 to determine when the flush is completed.
4.9 ICC0 Registers
The ICC0 base peripheral address is 0x4002 A000. Refer to Table 3-1: APB Peripheral Base Address Map for the addresses of
all APB mapped peripherals.
Table 4-7: Instruction Cache Controller Register Addresses and Descriptions
Offset
Register Name
Access
Description
[0x0000]
ICC0_CACHE_ID
RO
Cache ID Register
[0x0004]
ICC0_MEM_SIZE
R0
Cache Memory Size Register
[0x0100]
ICC0_CACHE_CTRL
R/W
Cache Control Register
[0x0700]
ICC0_INVALIDATE
R/W
Cache Invalidate Register
4.9.1 ICC0 Register Details
Table 4-8: ICC Cache ID Register
ICC Cache ID Register
ICC0_CACHE_ID
[0x0000]
Bits
Name
Access
Reset
Description
31:16
-
RO
-
Reserved for Future Use
Do not modify this field.
15:10
cchid
RO
-
Cache ID
Returns the Cache ID for this Cache instance.
9:6
partnum
RO
-
Cache Part Number
Returns the part number indicator for this Cache instance.
5:0
relnum
RO
-
Cache Release Number
Returns the release number for this Cache instance.
Table 4-9: ICC Memory Size Register
ICC Memory Size Register
ICC0_MEM_SIZE
[0x0004]
Bits
Name
Access
Reset
Description
31:16
memsz
RO
-
Addressable Memory Size
Indicates the size of addressable memory by this cache controller instance in 128KB
units.
15:0
cchsz
RO
-
Cache Size
Returns the size of the cache RAM memory in 1KB units.
16: 16KB Cache RAM