EasyManua.ls Logo

Maxim Integrated MAX32660 - Table 4-15: System Clock Control Register

Maxim Integrated MAX32660
195 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
MAX32660 User Guide
Maxim Integrated Page 36 of 195
Reset 0 Register
GCR_RST0
[0x0004]
Bits
Name
Access
Reset
Description
6
timer1
R/W1O
0
Timer1 Reset
Write 1 to reset the peripheral state to the reset default state. When complete this field will
read 0.
0: TMR1 peripheral not in reset.
1: Write 1 to reset the TMR1 peripheral.
5
timer0
R/W1O
0
Timer0 Reset
Write 1 to reset the peripheral state to the reset default state. When complete this field will
read 0.
0: TMR0 peripheral not in reset.
1: Write 1 to reset the TMR0 peripheral.
4:3
-
RO
0
Reserved for Future Use
Do not modify this field.
2
gpio0
R/W1O
0
GPIO0 Reset
Write 1 to reset the peripheral state to the reset default state. When complete this field will
read 0.
0: GPIO peripheral not in reset.
1: Write 1 to reset the GPIO peripheral.
1
wdt0
R/W1O
0
Watchdog Timer 0 Reset
Write 1 to reset the peripheral state to the reset default state. When complete this field will
read 0.
0: WDT0 peripheral not in reset.
1: Write 1 to reset the WDT0 peripheral.
0
dma
R/W1O
0
Standard DMA Reset
Write 1 to reset the peripheral state to the reset default state. When complete this field will
read 0.
0: Standard DMA peripheral not in reset.
1: Write 1 to reset the Standard DMA peripheral.
Table 4-15: System Clock Control Register
System Clock Control Register
GCR_CLK_CTRL
[0x0008]
Bits
Name
Access
Reset
Description
31:30
-
RO
0b11
Reserved for Future Use
Do not modify this field.
29
lirc8k_rdy
RO
0
8kHz Internal Oscillator Ready Status
On POR or System Reset this field reads 0 until the 8kHz low-frequency oscillator is ready for
use.
0: Not ready or not enabled.
1: Oscillator ready.
28:27
-
RO
0
Reserved for Future Use
Do not modify this field.
26
hirc_rdy
RO
0
High-Frequency Internal Oscillator Ready
On POR or System Reset this field reads 0 until the HFIO oscillator is ready. If the HFIO is
disabled (GCR_CLK_CTRL.hirc_en = 0) and firmware enables it (GCR_CLK_CTRL.hirc_en = 1),
reading this field will return 0 until the HFIO is ready for use.
0: Oscillator not ready or not enabled.
1: Oscillator ready.

Table of Contents

Related product manuals