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Maxim Integrated MAX32660 - Table 9-7: RTC Trim Register

Maxim Integrated MAX32660
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MAX32660 User Guide
Maxim Integrated Page 103 of 195
RTC Control Register
RTC_CTRL
[0x10]
Bits
Name
Access
Reset
Description
2
alarm_ss_en
R/W
0
Sub-Second Alarm Interrupt Enable
Set this bit to 1 to enable the RTC sub-second alarm interrupt. Check the
RTC_CTRL.busy flag after writing this bit to determine when the RTC synchronization
is complete.
0: Alarm sub-second interrupt disabled.
1: Enable alarm sub-second interrupt.
1
alarm_tod_en
R/W
0
Time-of-Day Alarm Interrupt Enable
Set this bit to 1 to enable the RTC time-of-day alarm interrupt. Check the
RTC_CTRL.busy flag after writing to this bit to determine when the RTC
synchronization is complete.
0: Time-of-day alarm interrupt is disabled.
1: Enable the time-of-day alarm interrupt.
0
enable
R/W
0
Real-Time Clock Enable
Enables and disables the RTC. The RTC write enable (RTC_CTRL.write_en) bit must be
set before changing this field. RTC Busy (RTC_CTRL.busy) must read 0 before writing
to this bit (RTC_CTRL.write_en). After writing to this bit, check the RTC_CTRL.busy flag
for 0 to determine when the RTC synchronization is complete.
0: RTC disabled.
1: RTC enabled.
Table 9-7: RTC Trim Register
RTC Trim Register
RTC_TRIM
[0x14]
Bits
Name
Access
Reset
Description
31:8
vrtc_tmr
R/W
0
VRTC Time Counter
This field is used to show the number of seconds the RTC has since the RTC was
enabled. Hardware increments this field every 32 seconds.
Note: This field is reset on a Power On Reset (POR).
7:0
trim
R/W
0
RTC Trim
This field specifies the 2s complement value of the trim resolution. Each increment or
decrement of the field adds or subtracts 1ppm at each 4kHz clock value with a
maximum correction of ± 127ppm.
Table 9-8: RTC Oscillator Control Register
RTC Oscillator Control Register
RTC_OSCCTRL
[0x18]
Bits
Name
Access
Reset
Description
31:16
-
R/W
0
Reserved for Future Use
Do not modify this field.
5
32kout
R/W
0
RTC Square Wave Output
0: 32kHz signal is not output to port pin (POR default).
1: Outputs the raw 32kHz clock to the 32KCAL alternate function if the alternate
function is enabled.
Note: This field is only reset on POR and not effected by other forms of reset.

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